3.10.3.3.1.1 EEARH, EEARL – EEPROM
Address Register High and Low Byte
Name: | EEARH, EEARL |
Offset: | 0x022,
0x021 |
Reset: | 0x00 |
Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| | | | | | EEAR10 | EEAR9 | EEAR8 | |
Access | R | R | R | R | R | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| EEAR7 | EEAR6 | EEAR5 | EEAR4 | EEAR3 | EEAR2 | EEAR1 | EEAR0 | |
Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 15 – Reserved Bit
This bit is reserved and
always read as ‘0
’.
Bit 14 – Reserved Bit
This bit is reserved and
always read as ‘0
’.
Bit 13 – Reserved Bit
This bit is reserved and
always read as ‘0
’.
Bit 12 – Reserved Bit
This bit is reserved and
always read as ‘0
’.
Bit 11 – Reserved Bit
This bit is reserved and
always read as ‘0
’.
Bits 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10 – EEAR EEPROM
Address
The EEPROM address
register, EEAR, specifies the EEPROM address in the 1152-byte EEPROM space. The
EEPROM data bytes are addressed linearly between 0 and 1151. The initial value of
EEAR is undefined. A proper value must be written before the EEPROM can be
accessed.