1.8.8 Debug DDR IO Margin

To access the Debug DDR IO Margin feature, select Debug DDR Memory from the main SmartDebug window. This option is available only for DDR3/DDR4/LPDDR3 memory configurations. This option is not visible when DDR memory is not used in the design. The default view of the DDR IO Margin window.

Important: After programming the device, the LED11 glows, indicating the completion of DDR transactions.
Important: To debug DDR in the SmartDebug, run the tcl script without the FHB_ENABLE argument.
Figure 1-51. DDR IO Margin Window

Initially, all options in the DDR IO Margin GUI are disabled. Select the required DDR instances and click Get Training Data. After this, a script is run for fetching the training data. After around two minutes the fetched information of the selected DDR Instance is displayed as shown in the following figure.

Figure 1-52. Training Data