25.5.12 Interrupt Flags

Name: INTFLAGS
Offset: 0x0D
Reset: 0x00
Property: -

Bit 76543210 
 ERRORCTSIC RXBRKRXSRXCTXCDRE 
Access R/WR/WR/WR/WRR/WR 
Reset 0000000 

Bit 7 – ERROR Error Interrupt Flag

This flag is set when an error occurrs during either transmission or reception. Errors that will set this flag have corresponding status flags in the Status (USARTn.STATUS) register. The specific errors that will set this flag are: PERR, FERR, ISF, COLL and BUFOVF. The flag can be cleared by writing a ‘1’ to its bit location.

Bit 6 – CTSIC Clear to Send Input Change Interrupt Flag

The CTSIC flag is set when a change is detected in CTS pin. The flag can be cleared by writing a ‘1’ to its bit location.

Bit 4 – RXBRK Receive Break Interrupt Flag

This interrupt flag is valid when the Frame Format (FORM) bitfield in the Control C (USARTn.CTRLC) register is configured to LINCLIENT or AUTOBAUD mode. The break detector uses a fixed threshold of 11 consecutive low bits to detect a Break condition. The RXBRK bit is set after a valid BREAK and SYNC character is detected. The bit is automatically cleared upon reception of the next data, and it can also be cleared manually by writing a ‘1’ to its bit location.

Bit 3 – RXS Receiver Start-of-Frame Interrupt Flag

This flag is set when Start-of-Frame detection is enabled, the device is in Standby sleep mode, and a valid start bit is detected. This flag can be cleared by writing a ‘1’ to its bit location. This flag is not used in SPI Host mode.

Bit 2 – RXC Receive Complete Interrupt Flag

This flag is set when there are unread data in the receive buffer and cleared when the receive buffer is empty.

Bit 1 – TXC Transmit Complete Interrupt Flag

This flag is set when the entire frame in the transmit shift register has been shifted out and there are no new data in the transmit buffer (TXDATAL and TXDATAH) registers. The flag is cleared when the Transmit Data (TXDATA) registers are written to, or by writing a ‘1’ to its bit location.

Bit 0 – DRE Data Register Empty Interrupt Flag

This flag is set when the Transmit Data (USARTn.TXDATAL and USARTn.TXDATAH) registers are empty, indicating they are ready to accept new data. The flag is cleared when these registers contain data that has not been moved into the transmit shift register.