4.13.4.14 PUF Disable Functions Register
This register can only be written if the WPEN bit is cleared in the SFR Write Protection Mode Register.
CAUTION:
This register only allows to write ‘ones’ and forbids to write ‘zeros’. A chip reset is needed to clear this register.
The following configuration values are valid for all listed bit names of this register:
0: The operation is permitted.
1: The operation is forbidden.
| Name: | SFR_PUFDIS |
| Offset: | 0x2208 |
| Reset: | 0x00000000 |
| Property: | Read/Write |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| RESEED | LAB_TEST_MODE | TEST_MEMORY | RECONSTRUCT | WRAP_GENERATED_RANDOM | |||||
| Access | R/W | R/W | R/W | R/W | R/W | ||||
| Reset | 0 | 0 | 0 | 0 | 0 |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| WRAP | UNWRAP | TEST_PUF | STOP | START | GET_KEY | GENERATE_RANDOM | ENROLL | ||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |