17.9.15 CoreSight ROM Table Entry 4 Register

Table 17-18. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit——
Name: ENTRY4
Offset: 0x1010
Reset: 0x00000000
Property: R

Bit 3130292827262524 
 ADDOFF[19:12] 
Access RRRRRRRR 
Reset 00000000 
Bit 2322212019181716 
 ADDOFF[11:4] 
Access RRRRRRRR 
Reset 00000000 
Bit 15141312111098 
 ADDOFF[3:0]     
Access RRRR 
Reset 0000 
Bit 76543210 
       FMTEPRES 
Access RR 
Reset 00 

Bits 31:12 – ADDOFF[19:0] Base address of the component, relative to the base address of this ROM Table.

Bit 1 – FMT CoreSight Rom Table Format

ValueNameDescription
132-bit format
08-bit format

Bit 0 – EPRES CoreSight Entry Present

ValueNameDescription
1Entry present
0Entry not present