17.9.10 Debugger Access Level REGISTER

Table 17-13. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit——
Name: DAL
Offset: 0x124
Reset: 0x00000000
Property: R

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 CPU3[1:0]CPU2[1:0]CPU1[1:0]CPU0[1:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 2:3, 4:5, 6:7 – CPU Condition: {DSU_TZ_IMPLEMENTED==0} 01 = Reserved

ValueNameDescription
3UNIMPLEMENTEDUnimplemented CPU
2FULL_DEBUGDebugger has full access to debug CPUn
1NS_DEBUGDebugger can access only non-secure regions
0SECUREDDebugger access is disabled
3UNIMPLEMENTEDUnimplemented CPU
2FULL_DEBUGDebugger has full access to debug CPUn
0SECUREDDebugger access is disabled

Bits 1:0 – CPU0[1:0] Condition: {DSU_TZ_IMPLEMENTED==1} 11 = Reserved Condition: {DSU_TZ_IMPLEMENTED==0} 11 = Reserved 01 = Reserved

Writing in this bitfield has no effect.

0x0 = (SECURED) Debugger targeting CPU0 domain can only access the DSU external address space otherwise debugger access is disabled

0x1 = (NS_DEBUG) Debugger can access only non-secure regions. This value is only applicable to PIC32CM SG devices.

0x2 = (FULL_DEBUG) Debugger can access secure and non-secure regions.

0x3 = Reserved.

ValueNameDescription
2FULL_DEBUGDebugger can access secure and non-secure regions
1NS_DEBUGDebugger can access only non-secure regions
0SECUREDDebugger targeting CPU0 domain can only access the DSU external address space otherwise debugger access is disabled
2FULL_DEBUGDebugger has unrestricted access.
0SECUREDDebugger targeting CPU0 domain can only access the DSU external address space otherwise debugger access is disabled