17.9.4 Control C REGISTER
| Symbol | Description | Symbol | Description | Symbol | Description |
|---|---|---|---|---|---|
| R | Readable bit | HC | Cleared by Hardware | (Grey cell) | Unimplemented |
| W | Writable bit | HS | Set by Hardware | X | Bit is unknown at Reset |
| K | Write to clear | S | Software settable bit | — | — |
| Name: | CTRLC |
| Offset: | 0x100 |
| Reset: | 0x00000000 |
| Property: | R/W |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| DBGRW | |||||||||
| Access | R/W | ||||||||
| Reset | 0 |
Bit 0 – DBGRW If ext_cpu_me[n]=0, this bit field becomes undefined where reads return 0 and writes are ignored. This does not apply to DBGRW0 since CPU0 can never be disabled by ext_cpu_me[0].
| Value | Name | Description |
|---|---|---|
| 1 | Debugger accesses through CPUn do not carry the debug attribute (i.e debugger reads are destructive). | |
| 0 | Allow debugger accesses through CPUn to carry the debug attribute (i.e debugger reads are non-destructive). |