35.10.3 External Clock
| Symbol | Description | Min. | Typ. ✝ | Max. | Units | Conditions |
|---|---|---|---|---|---|---|
| fCLCL* | Clock frequency | — | — | 20 | MHz | |
| TCLCL | Clock period | 50 | — | — | ns | |
| tCHCX | High time | — | 40 | — | % | |
| tCLCX | Low time | — | 40 | — | % | |
| ΔTCLCL | Change in period from cycle to cycle time | — | 20 | — | % | |
|
✝ Data in the “Typ.” column is measured at TA = 25°C and VDD = 3.0V unless otherwise specified. These parameters are not tested and are for design guidance only. * The system clock is derived from the external clock and must be prescaled to comply with the system clock timing characterstics. | ||||||
