2.1.1.8.3 Read-Before-Write

In a read-before-write operation for pipeline mode, read data is available on the data output bus on the next clock cycle. For non-pipeline mode, the previous memory data from the current write address is available on the data output before the new data is written to the address location. For more information, see Figure   1.

In Dual-Port mode during read-before-write operations, the data output of each port can change in one of the following ways:

• During read port reset, the data output becomes zero.
• If the block select input (A_BLK_EN) of Port A or B is driven low, then the corresponding port's data output becomes zero.
• During valid write operations when read enables (A_REN and B_REN) are driven high, the previous memory data from the current address is available on the data output before the new data is written to the address location.
• If there is a valid read operation, then the read data is available on the data output. A valid read happens when read enable (A_REN and B_REN) inputs are driven high, and byte write enable (A_WEN[1:0] and B_WEN[1:0]) inputs are driven low.

The following figure shows the timing for feed-through-write and read-before-write operations for Dual-Port mode.