5.1.9.1 Read-Data Pipeline Register Control Signals

  • A_BYPASS and B_BYPASS
  • A_DOUT_EN and B_DOUT_EN
  • A_DOUT_SRST_N and B_DOUT_SRST_N
  • A_DOUT_ARST_N and B_DOUT_ARST_N

Two-port mode is in effect when the width of at least one port is greater than 20 bits, and the A_DOUT register signals control the MSb of the read-data, while the B_DOUT register signals control the LSb of the read-data.

The following table lists the functionality of the control signals on the A_DOUT and B_DOUT pipeline registers.

Table 5-8. Truth Table for A_DOUT and B_DOUT Registers
ARST_NA_BYPASS/

B_BYPASS

A_CLK/B_CLKA_EN/B_ENA_SRST_N/

B_SRST_N

DQn+1
0XXXXX0
10Not risingXXXQn
100XXQn
1010X0
1011DD
11XXXDD