5.1.9.1 Read-Data Pipeline Register Control Signals
(Ask a Question)- A_BYPASS and B_BYPASS
- A_DOUT_EN and B_DOUT_EN
- A_DOUT_SRST_N and B_DOUT_SRST_N
- A_DOUT_ARST_N and B_DOUT_ARST_N
Two-port mode is in effect when the width of at least one port is greater than 20 bits, and the A_DOUT register signals control the MSb of the read-data, while the B_DOUT register signals control the LSb of the read-data.
The following table lists the functionality of the control signals on the A_DOUT and B_DOUT pipeline registers.
| ARST_N | A_BYPASS/ B_BYPASS | A_CLK/B_CLK | A_EN/B_EN | A_SRST_N/ B_SRST_N | D | Qn+1 |
|---|---|---|---|---|---|---|
| 0 | X | X | X | X | X | 0 |
| 1 | 0 | Not rising | X | X | X | Qn |
| 1 | 0 | ↑ | 0 | X | X | Qn |
| 1 | 0 | ↑ | 1 | 0 | X | 0 |
| 1 | 0 | ↑ | 1 | 1 | D | D |
| 1 | 1 | X | X | X | D | D |
