16.13.6 Memory BIST Fault Injection 0

Note:
  1. MBFI0, BCC[0] and DCC[0] are aliases that use the same internal 32-bit register.
  2. This register is write-protected when CFG.MBFI=0.
  3. This register is not asynchronously reset, therefore it must be properly initialized before starting any MBIST operation.
Table 16-14. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: MBFI0
Offset: 0x0014
Reset: 0x00000000
Property: PAC Write Protection

Bit 3130292827262524 
 AMMSK[23:16] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 
Bit 2322212019181716 
 AMMSK[15:8] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 
Bit 15141312111098 
 AMMSK[7:0] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 
Bit 76543210 
 FTYPEAMMOD BIDX[4:0] 
Access R/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxx 

Bits 31:8 – AMMSK[23:0] Address Matching Mask

Address matching address mask. Each ‘1’ at position x indicates that the byte address bit x+2 generated by the DSU AHB host during MBIST operation is "Don't Care".

Bit 7 – FTYPE Fault Type

0x0 =Stuck At 0 (STUCKAT0)

0x1 =Stuck At 1 (STUCKAT1)

Bit 6 – AMMOD Address Matching Mode

0x0 =Address match, fault injected when the masked host address matches with the masked address (ADDR).

0x1 =Always matches, fault injected every AHB access (ALWAYS).

Bits 4:0 – BIDX[4:0] Bit Index of Injected Fault

Indicates the bit position of the fault to be injected in the data read by DSU AHB host (0 to 31).