16.13.7 Memory BIST Fault Injection 1

Note:
  1. MBFI1, BCC[1] and DCC[1] are aliases that use the same internal 32-bit register.
  2. This register is write-protected when CFG.MBFI=0.
  3. This register is not asynchronously reset, therefore it must be properly initialized before any MBIST operation.
Table 16-15. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: MBFI1
Offset: 0x0018
Reset: 0x00000000
Property: PAC Write Protection

Bit 3130292827262524 
 ADDR[29:22] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 
Bit 2322212019181716 
 ADDR[21:14] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 
Bit 15141312111098 
 ADDR[13:6] 
Access R/WR/WR/WR/WR/WR/WR/WR/W 
Reset xxxxxxxx 
Bit 76543210 
 ADDR[5:0]   
Access R/WR/WR/WR/WR/WR/W 
Reset xxxxxx 

Bits 31:2 – ADDR[29:0] Word Address

A fault is injected during the AHB data phase when CFG.MBFI = 1, MBIST is operating, and one of these conditions is true:

  1. MBFI0.AMMOD = 1 (ALWAYS),

    or

  2. ((DSU AHB Host byte address[31:2]) & ~{6'h00,MBFI0.AMMSK} == MBFI1.ADDR & ~{6'h00,MBFI0.AMMSK}).