16.13.26 Coresight ROM Table Component Identification 1

Table 16-34. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: CID1
Offset: 0x1FF4
Reset: 0x00000010
Property: -

Bit 3130292827262524 
          
Access  
Reset  
Bit 2322212019181716 
          
Access  
Reset  
Bit 15141312111098 
          
Access  
Reset  
Bit 76543210 
 CCLASS[3:0]PREAMBLE[3:0] 
Access RRRRRRRR 
Reset 00010000 

Bits 7:4 – CCLASS[3:0] Component Class

These bits will always return 0x1 when read indicating that this ARM CoreSight component is ROM table (refer to the ARM Debug Interface v5 Architecture Specification at www.arm.com).

Bits 3:0 – PREAMBLE[3:0] Preamble

These bits will always return 0x00 when read.