14.6.10 ITCM Fault Error Capture Address Register

Note:
  1. Writes to this read-only register cause a bus error.
Table 14-12. Register Bit Attribute Legend
SymbolDescriptionSymbolDescriptionSymbolDescription
RReadable bitHCCleared by Hardware(Grey cell)Unimplemented
WWritable bitHSSet by HardwareXBit is unknown at Reset
KWrite to clearSSoftware settable bit
Name: IFLTCAP
Offset: 0x0024
Reset: 0x00000000
Property: -

Bit 3130292827262524 
 ITCMMASTER[3:0]     
Access RRRR 
Reset 0000 
Bit 2322212019181716 
        IFLTADR[16] 
Access R 
Reset 0 
Bit 15141312111098 
 IFLTADR[15:8] 
Access RRRRRRRR 
Reset 00000000 
Bit 76543210 
 IFLTADR[7:0] 
Access RRRRRRRR 
Reset 00000000 

Bits 31:28 – ITCMMASTER[3:0] Host ID of the Requester of the Current Error Access

ValueDescription
0b0000 Instruction fetch
0b0001Data access
0b0010Vector fetch on automated exception entry
0b0011AHB client access
0b0100Debugger access
0b0101MBIST access
0b1001Software data access from store queue
0b1011AHB client access from store queue
0b1100Debugger access from store queue

Bits 16:0 – IFLTADR[16:0] Instruction TCM ECC Fault Address which Caused the ECC Error.