1.4.5.1 64b66b Latency Considerations

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When integrating systems with the 64b66b encoding protocol, it is important to consider the potential for increased variable latency. The 64b66b gearbox, which is used to convert between the 64-bit data words used by the Physical Media Attachment (PMA) and the 66-bit encoded words, can introduce a variable latency of up to one fabric tx/rx clock period in both transmit and receive directions. This variability in latency is a result of the operation of the gearbox, which must handle the alignment and conversion between the differing word sizes.

The 64-bit interface of the PMA does not directly match the 66-bit blocks of the encoded data stream, necessitating this conversion process and resulting in the potential for one clock cycle of latency variation. The following examples can be used when using the 64b66b PCS XCVR interface:

$Rx latency delay = \frac{250.5}{10.3125 G b p s} \pm (\frac{1}{161.13 M H z})$
$Tx latency delay = \frac{292}{10.3125 G b p s} \pm (\frac{1}{161.13 M H z})$

Important: For example, 10GBASE-R uses 32-bit fabric width. 161.13 MHz is used for fabric interface clock, which is 66-bit bus width.