36.6 Peripherals Power Consumption
The table below shows how to calculate the additional current consumption for the different I/O peripherals in the various operating modes. Some peripherals will request that the clock be enabled when operating in STANDBY. Refer to the peripheral section for further information.
Operating conditions:
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Symbol | Description | Min. | Typ.✝ | Max. 85°C | Max. 125°C | Unit | Conditions | |
IDD_WDT | Watchdog Timer (WDT) | — | 680 | — | — | nA | 32.768 kHz internal oscillator | |
IBG | Bandgap | — | 18.5 | — | — | µA | ||
IDD_VREF | Voltage Reference (VREF) | — | 55 | — | — | µA |
ACREF enabled, VREF = 2.048V Excluding bandgap | |
IDD_BOD | Brown-out Detector (BOD) | — | 14 | — | — | μA |
Brown-out Detect (BOD) continuous Excluding bandgap | |
— | 0.6 | — | — | μA |
Brown-out Detect (BOD) sampling @128 Hz, including IDD_OSC32K Excluding bandgap | |||
— | 0.42 | — | — | μA |
Brown-out Detect (BOD) sampling @32 Hz, including IDD_OSC32K Excluding bandgap | |||
IDD_TCB | 16-bit Timer/Counter Type B (TCB) | — | 23 | — | — | μA | ||
IDD_RTC | Real-Time Counter (RTC) | — | 0.6 | — | — | μA | 32.768 kHz internal oscillator (OSC32K) | |
IDD_OSC32K | 32.768 kHz Internal Oscillator (OSC32K) | — | 330 | — | — | nA | ||
IDD_XOSC32K | 32.768 kHz Crystal Oscillator (XOSC32K) | — | 1.3 | — | — | µA |
LPMODE = Enabled ESR=50 kOhm, CL = 12.5 pF | |
— | 5.7 | — | — | µA |
LPMODE = Disabled ESR=50 kOhm, CL = 12.5 pF | |||
IDD_OSCHF | Internal High Frequency Oscillator (OSCHF) | — | 90 | — | — | µA | ||
IDD_PLL | Phase-Locked Loop (PLL) | — | 330 | — | — | μA |
PLL_MULFAC = 8x device in Idle sleep mode | |
— | 670 | — | — | μA |
PLL_MULFAC = 16x device in Idle sleep mode | |||
IDD_ADC(2) | Analog-to-Digital Converter (ADC) | — | 280 | — | — | μA | ADC.REFSEL = VDD | |
— | 400 | — | — | μA | ADC.REFSEL = Internal 2.048V | |||
IDD_AC | Analog Comparator (AC) | — | 147 | — | — | μA |
CTRLA.POWER = device in Idle sleep mode | |
— | 105 | — | — | μA |
CTRLA.POWER = device in Idle sleep mode | |||
IDD_USART | Universal Synchronous and Asynchronous Receiver and Transmitter (USART) | — | — | — | — | µA | USART Enabled @9600 Baud | |
IDD_SPI | Serial Peripheral Interface (SPI) | — | 7 | — | — | μA |
SPI Host @100 kHz, device in Idle sleep mode | |
IDD_TWI | Two-Wire Interface (TWI) | — | 27 | — | — | μA |
TWI Host @100 kHz, device in Idle sleep mode | |
— | 21 | — | — | μA |
TWI Client @100 kHz, device in Idle sleep mode | |||
IDD_NVM_ERASE | Flash Programming Erase | — | 7 | — | — | mA | ||
IDD_NVM_WRITE | Flash Programming Write | — | 10 | — | — | mA | ||
✝ Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V. These parameters are not tested and are for design guidance only. Note:
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