36.13 USART

Figure 36-3. USART in SPI Mode - Timing Requirements in Host Mode
Table 36-18. USART in SPI Host Mode - Timing Specifications
SymbolDescriptionMin.Typ.✝Max.UnitCondition
fSCK *SCK clock frequencyfCLK_PER / 2MHz
TSCK *SCK period2 × TCLK_PERns
tSCKWSCK high/low width0.5 × TSCKns
tSCKRSCK rise time2.7ns
tSCKFSCK fall time2.7ns
tMISMISO setup to SCK10ns
tMIHMISO hold after SCK10ns
tMOSMOSI setup to SCK0.5 × TSCKns
tMOHMOSI valid after SCK1ns

Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V . These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.