36.14 SPI

Figure 36-4. SPI - Timing Requirements in Host Mode
Table 36-19. SPI - Timing Specifications in Host Mode
SymbolDescriptionMin.Typ.✝Max.UnitCondition
fSCK *SCK clock frequency——fCLK_PER / 2MHz
TSCK *SCK period2 × TCLK_PER——ns
tSCKWSCK high/low width—0.5 × TSCK—ns
tSCKRSCK rise time—2.7—ns
tSCKFSCK fall time—2.7—ns
tMISMISO setup to SCK—10—ns
tMIHMISO hold after SCK—10—ns
tMOSMOSI setup to SCK—0.5 × TSCK—ns
tMOHMOSI valid after SCK—1—ns

✝ Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V . These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.

Figure 36-5. SPI - Timing Requirements in Client Mode
Table 36-20. SPI - Timing Specifications in Client Mode
SymbolDescriptionMin.Typ.✝Max.UnitCondition
fSSCK *Client SCK clock frequency——fCLK_PER / 6MHz
TSSCK *Client SCK period6 × TCLK_PER——ns
tSSCKW *SCK high/low width2 × TCLK_PER——ns
tSIS *MOSI setup to SCK—0—ns
tSIH *MOSI hold after SCK3 × TCLK_PER——ns
tSSS *SS low before SCK21——ns
tSSH *SS high after SCK20——ns
tSOSMISO valid after SCK—8—ns
tSOSSMISO valid after SS low—11—ns
tSOSHMISO disable time after SS high—8—ns

✝ Unless otherwise specified, data in the “Typ.” column is at TA = 25°C and VDD = 3.0V . These parameters are not tested and are for design guidance only.

* These parameters are characterized but not tested in production.