67.7.9.1 Track and Hold Time versus Source Impedance – Sampling Rate

Referring to Figure 67-35, during its tracking phase, the 12-bit ADC charges its sampling capacitor CS through various serial resistors modeled as RSOURCE (source output resistor) and RON (multiplexer series resistor and sampling switch series resistor). In case of high output source resistance (with a low-power resistive divider, for example), the tracking time must be increased to ensure full settling of the sampling capacitor voltage. Of course, programming a long tracking time may impact the sampling frequency (fS). The following formula calculates the minimum tracking time to ensure a 12-bit accurate settling:

  • tTRACK ≥ 8 x (RSOURCE + RON) x CS

The ADC Controller (ADCC) counts the tracking time in ADC clock cycles (tCKADC). This time can be adjusted between 6 and 54 cycles using the ADC_MR.TRACKTIM and ADC_EMR.TRACKX4 fields. At maximum ADC clock frequency (20 MHz), the maximum tracking time that can be programmed is 2.7 µs. This limits 12-bit accurate sampling to sources having RSOURCE in the 100 kΩ range. To overcome this limitation, the ADC clock frequency can be decreased.

The following examples show typical use cases of tracking time and sampling frequency calculation.

Example 1: Calculated tracking time is lower than the default (minimum) tracking time.

  • Assuming fCKADC = 8 MHz (tCKADC = 125 ns), RSOURCE = 10 kΩ
  • The minimum required track time is tTRACK = 8 x (10 kΩ + 2 kΩ) x 3pF = 288 ns
  • tTRACK is less than the minimum tracking time (6 x tCKADC = 750 ns): set TRACKTIM = 0 and TRACKX4 = 0
  • The real tracking time is 6 x tCKADC (750 ns) and the conversion time is:

    tCONV = tTRACK + 14 x tCKADC= 20 x tCKADC

  • The sampling rate is fS = 8 MHz / 20 = 400 kS/s
  • The maximum allowable source resistance is RSOURCE_MAX = (6 x tCKADC) / (3 pF x 8) - 2 kΩ= 29.25 kΩ

Example 2: Calculated tracking time is greater than the default (minimum) tracking time.

  • Assuming fCKADC = 20 MHz (tCKADC = 50 ns), RSOURCE = 20 kΩ
  • The minimum required track time is tTRACK = 8 x (20 kΩ + 2 kΩ) x 3 pF= 528 ns
  • tTRACK is greater than the minimum tracking time (6 x tCKADC = 300 ns): set TRACKTIM=5 and TRACKX4=1
  • The real tracking time is (4 x (5 + 1) - 10) = 14 x tCK_ADC = 700 ns
  • The conversion time is tCONV = tTRACK + 14 x tCKADC= 28 x tCKADC
  • The sampling rate is fS = 20 MHz / 28 = 714.3 kS/s
  • The maximum allowable source resistance is RSOURCE_MAX = (14 x tCKADC) / (3 pF x 8) - 2 kΩ= 27.2 kΩ

Example 3: Maximum sampling rate operation.

  • Assuming fCKADC = 20 MHz (tCKADC = 50 ns), RSOURCE = 10 kΩ
  • The minimum required track time is tTRACK = 8 x (10 kΩ + 2 kΩ) x 3 pF= 288 ns
  • tTRACK is less than the minimum tracking time (6 x tCKADC = 300 ns): set TRACKTIM=0 and TRACKX4=0
  • The real tracking time is 6 x tCK_ADC (300 ns) and the conversion time is:

    tCONV = tTRACK + 14 x tCKADC= 20 x tCKADC

  • The sampling rate is fS = 20 MHz / 20 = 1 MS/s
  • The maximum allowable source resistance is RSOURCE_MAX = (6 x tCKADC) / (3 pF x 8) - 2 kΩ= 10.5 kΩ