2.3.6.1 Fully Registered I/O Buffers with Synchronous Enable and Asynchronous Preset

Table 2-70. Parameter Definition and Measuring Nodes

Parameter Name	Parameter Definition	Measuring Nodes (from, to)1
tOCLKQ	Clock-to-Q of the Output Data Register	H, DOUT
tOSUD	Data Setup Time for the Output Data Register	F, H
tOHD	Data Hold Time for the Output Data Register	F, H
tOSUE	Enable Setup Time for the Output Data Register	G, H
tOHE	Enable Hold Time for the Output Data Register	G, H
tOPRE2Q	Asynchronous Preset-to-Q of the Output Data Register	L, DOUT
tOREMPRE	Asynchronous Preset Removal Time for the Output Data Register	L, H
tORECPRE	Asynchronous Preset Recovery Time for the Output Data Register	L, H
tOECLKQ	Clock-to-Q of the Output Enable Register	H, EOUT
tOESUD	Data Setup Time for the Output Enable Register	J, H
tOEHD	Data Hold Time for the Output Enable Register	J, H
tOESUE	Enable Setup Time for the Output Enable Register	K, H
tOEHE	Enable Hold Time for the Output Enable Register	K, H
tOEPRE2Q	Asynchronous Preset-to-Q of the Output Enable Register	I, EOUT
tOEREMPRE	Asynchronous Preset Removal Time for the Output Enable Register	I, H
tOERECPRE	Asynchronous Preset Recovery Time for the Output Enable Register	I, H
tICLKQ	Clock-to-Q of the Input Data Register	A, E
tISUD	Data Setup Time for the Input Data Register	C, A
tIHD	Data Hold Time for the Input Data Register	C, A
tISUE	Enable Setup Time for the Input Data Register	B, A
tIHE	Enable Hold Time for the Input Data Register	B, A
tIPRE2Q	Asynchronous Preset-to-Q of the Input Data Register	D, E
tIREMPRE	Asynchronous Preset Removal Time for the Input Data Register	D, A
tIRECPRE	Asynchronous Preset Recovery Time for the Input Data Register	D, A

Note:

1. See Figure 2-24 for more information.