24.4.4.3.3 I3C Target Interrupt Request (SIR)
If the received IBI ID matches the Dynamic Address of any one of the valid entries in the DAT and the received RnW bit is 1, the response for the received SIR is based on the programmed SIRREJ field of the device address table (DAT).
If the I3CxDEVADDRTABnLOC1[SIRREJ] is set to 1, the Controller NACKs the SIR and then issues a directed DISEC CCC command (DISINT bit set) with the RESTART condition targeting the matching Dynamic Address. This disables the SIR generation in the requested Target device. The IBI status for the corresponding SIR indicates to the application that the incoming IBI is NACK'd through the ‘IBI_STS’ field in IBI Queue Data Structure.
If I3CxDEVADDRTABnLOC1[SIRREJ] is set to 0, the Controller ACKs the SIR. If the IBI Payload Control is set to 1, the Controller continues to generate the SCL clocks after the ACK to accept the IBI payload bytes starting from the MDB (Mandatory Data Byte) until the Target device terminates the transfer. The application must set I3CxDEVADDRTABnLOC1[IBIWITHDAT] to 1 only when the Target device supports the mandatory byte (BCR[2]=1). If the I3CxDEVADDRTABnLOC1[IBIWITHDAT] is set to 0, the Controller stops generating the SCL clock after acknowledging the SIR. The Controller then notifies the application to take necessary action for the accepted SIR. The application must not set the I3CxDEVADDRTABnLOC1[IBIWITHDAT] to 1 when the Target device does not support the mandatory data byte (BCR[2]=0).
