29.3.2 Clocks

The WDT’s clock is sourced from the internal Ultra-Low Power Oscillator. This oscillator is optimized for power consumption, not frequency accuracy. The exact time-out interval will vary from device to device. This variation must be considered when designing software that uses the WDT to ensure that the time-out intervals used are valid for all devices. Refer to the Electrical Characteristics section for more specific information.

The WDT clock (CLK_WDT) is asynchronous to the peripheral clock. Due to this asynchronicity, writing to the Control A (CTRLA) register will require synchronization between the clock domains.

The WDT has a clock monitor to detect failures in CLK_WDT. For more information, see the WDT Clock Monitor section.