30.3.2 Clocks
The SWDT logic is clocked by the peripheral clock, CLK_PER. The SWDT counter decrements by one for each peripheral clock or completed instruction depending on the MODE bit in the CTRLA register.
The SWDT logic is clocked by the peripheral clock, CLK_PER. The SWDT counter decrements by one for each peripheral clock or completed instruction depending on the MODE bit in the CTRLA register.
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