This peripheral has registers that can be placed under Lock Protection, a security
mechanism to prevent unintentional changes, by writing a ‘1’ to the
LOCK bit in the CTRLA register. Attempting to write to these registers when the LOCK bit
is ‘1’ leaves the protected register unchanged and returns a Bus Error
on the data bus.
The ENABLE bit in the CTRLA register can never be cleared from software, regardless of
whether Lock Protection is active. Once the SWDT is enabled, it can be disabled only by
device reset.
The following registers are under Lock Protection:
Table 30-2. Registers Under Lock
Protection| Register | Key |
|---|
| SWDT.CTRLA | LOCK |
| SWDT.INTCTRL | LOCK |
| SWDT.RESET | LOCK |
| SWDT.WINDOW | LOCK |
When Lock Protection is active, the following registers are automatically placed under
Configuration Change Protection regardless of the status of the CCP bit in the CTRLA
register:
Table 30-3. Registers Automatically Under
Configuration Change Protection When Lock Protection Is Active| Register | Key |
|---|
| SWDT.CTRLB | IOREG |
| SWDT.INTFLAGS | IOREG |
| SWDT.COMMAND | IOREG |
The following table summarizes the interaction between CCP and Lock Protection:
Table 30-4. Summary of CCP and Lock
Protection| CCP | LOCK | Protection of CTRLB, INTFLAGS, COMMAND | Protection of CTRLA, INTCTRL, RESET, WINDOW | Comment |
|---|
| 0 | 0 | No protection. Can be written anytime | No protection. Can be written anytime | ENABLE bit in the CTRLA register can only be written to
‘1’, but not cleared by writing it to
‘0’ |
| 1 | 0 | CCP protected. Any write requires a CCP unlock sequence | CCP protected. Any write requires a CCP unlock sequence |
| X | 1 | CCP protected. Any write requires a CCP unlock sequence | Locked. cannot be written, except for the ENABLE bit in the CTRLA
register |
