50.7.15 PLLB and PLLC Characteristics

Table 50-37. PLLB and PLLC Characteristics
Symbol	Parameter	Conditions	Min	Max	Unit
V_DDPLL	Supply voltage range	–	1.04	1.21	V
I_VDDPLL	Current consumption⁽³⁾		–	5	μA/MHz
f_IN	Input frequency range	–	5	50	MHz
f_PLLACK	VCO frequency range PLLBCK/PLLCCK	–	300	600	MHz
t_LOCK	Lock time⁽³⁾	–	–	150	μs
t_START	Start-up time⁽³⁾	–	–	50	μs

Note:

Internal frequency range of the PLLB. Two output clocks are provided. PLLBCK and PLLCCK for core and peripherals frequency selection. Refer to section Power Management Controller (PMC).
Slow clock crystal oscillator output allowed only.
Simulation data.