50.7.11 Crystal Oscillators Design Considerations

When choosing a crystal for the 32.768 kHz Crystal Oscillator or for the Main Crystal Oscillator, several parameters must be taken into account. Important parameters are as follows:

Crystal Load CapacitanceC_L or C_CRYSTAL 
The total capacitance loading the crystal, including the oscillator’s internal parasitics and the PCB parasitics, must match the load capacitance for which the crystal’s frequency is specified. Any mismatch in the load capacitance with respect to the crystal specification leads to inaccurate oscillation frequency.

Crystal Drive Level 
Use only crystals with specified drive levels greater than the specified MCU oscillator drive level. Applications that do not respect this criterion may damage the crystal.

Crystal Equivalent Series Resistance (ESR) 
Use only crystals with a specified ESR lower than the specified MCU oscillator ESR. In applications where this criterion is not respected, the crystal oscillator may not start.

Crystal Shunt Capacitance (C_S or C₀) 
Use only crystals with a specified shunt capacitance lower than the specified MCU oscillator shunt capacitance. In applications where this criterion is not respected, the crystal oscillator may not start.

PCB Layout Considerations 
To minimize inductive and capacitive parasitics associated with XIN, XOUT, XIN32, XOUT32 nets, it is recommended to route them as short as possible. It is also of prime importance to keep those nets away from noisy switching signals (clock, data, PWM, etc.). A good practice is to shield them with a quiet ground net to avoid coupling to neighboring signals.