17.5.8.2 Refresh Using Auto Refresh Feature Inside the UDDRC

The UDDRC provides advanced refresh controls. Besides fully-configurable refresh constraints (t_RFC(min) and t_REFI), the UDDRC can also be programmed to gather refreshes to each rank of SDRAM to reduce the bandwidth consumed by refreshes and to increase the likelihood that refreshes can be serviced during an idle period.

Fine-grain control of the refreshes ensures these benefits can be balanced against worst case latencies associated with servicing refreshes together. Staggered refresh timers for multi-rank configurations of the UDDRC allow transactions to continue to other ranks while refreshes are taking place to just one rank.

To minimize the worst case impact of a forced refresh cycle, the UDDRC can be programmed to issue single refreshes at a time by forcing RFSHCTL0.refresh_burst = 0 (see Register Descriptions). It can be programmed to burst up to 8 refreshes (RFSHCTL0.refresh_burst = 7). In LPDDR2/3 mode, with per-bank refresh enabled (RFSHCTL0.per_bank_refresh = 1), the maximum refresh burst supported by UDDRC is 64 (RFSHCTL0.refresh_burst = 63). Burst refresh can be used to minimize the bandwidth lost to closing pages for refresh and to increase the likelihood that refreshes can be serviced during idle periods. It can also be programmed to any number in between to trade-off the benefits of each.