3.2.4 DISIIPL(W) Instruction Current IPL
Threshold
Table 3-4. Register Bit Attribute Legend
Symbol
Description
Symbol
Description
Symbol
Description
R
Readable
bit
HC
Cleared by
Hardware
(Gray
cell)
Unimplemented
W
Writable
bit
HS
Set by
Hardware
X
Bit is unknown
at Reset
C
Write to
clear
S
Software
settable bit
x
Channel
number
Name:
DISIIPL
Offset:
0x00C
Bit
31
30
29
28
27
26
25
24
Access
Reset
Bit
23
22
21
20
19
18
17
16
Access
Reset
Bit
15
14
13
12
11
10
9
8
Access
Reset
Bit
7
6
5
4
3
2
1
0
DISIIPL[2:0]
Access
R
R
R
Reset
0
0
0
Bits 2:0 – DISIIPL[2:0] DISIIPL(W) current IPL threshold
value
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