Left Justified Audio Host Mode Operation

Use the following steps to set up the SPI module for the Left Justified Audio Host mode of operation:

  1. If using interrupts, disable the SPIx interrupts in the respective IECx register.
  2. Stop and reset the SPI module by clearing the ON bit (SPIxCON1[15]).
  3. Reset the SPIx Control Register 1, SPIxCON1.
  4. Reset the SPIx Baud Rate Register, SPIxBRG.
  5. Clear the receive buffer.
  6. Clear the ENHBUF bit (SPIxCON1[0]) if using Standard Buffer mode or set the bit if using Enhanced Buffer mode.
  7. If using interrupts, the following additional steps are performed:
    1. Clear the SPIx interrupt flags/events in the respective IFSx register.
    2. Write the SPIx interrupt priority and sub-priority bits in the respective IPCx register.
    3. Set the SPIx interrupt enable bits in the respective IECx register.
  8. Clear the SPIROV bit (SPIxSTAT[6]).
  9. Write the desired settings in the SPIxCON1 register. The AUDMOD[1:0] bits (SPIxCON1[25:24]) must be set to ‘01’ for left justified and the AUDEN bit (SPIxCON1[31]) must be set to ‘1’ to enable the audio protocol.
  10. Set the SPIx Baud Rate Register, SPIxBRG, to 0x0F (to generate approximately 625 kbps sample rate with SPICLK @ 20 MHz).
  11. Write the desired settings to the SPIxCON1 register:
    1. Set to Host mode, MSTEN (SPIxCON1[5]) = 1.
    2. Set Clock Polarity, CKP (SPIxCON1[6]) = 0.
    3. Set Frame Polarity, FRMPOL (SPIxCON1[21]) = 1.
    4. Set MODE[32,16] (SPIxCON1[11:10]) = 0 for 16-bit audio channel data.
    5. Enable SPI operation by setting the ON bit (SPIxCON1[15]).
  12. Transmission (and reception) will start immediately after the ON bit is set.

Left Justified Host Mode, 625 kbps BLCK, 16-Bit Channel Data, 32-Bit Frame

/* The following code example will initialize the SPI1 Module in Left Justified Host mode. */
_SPI1TXIP = 4;
SPI1STATbits.SPIROV = 0;     // clear the Overflow
SPI1BRG = 0x000F;            // to generate 625 kbps sample rate, SPICLK @ 20 MHz
SPI1CON1 = 0x81200420;       // AUDEN =1, Left Justified mode, stereo mode, 
                             // FRMPOL = 1, 16 bits/32 channel transfer,Host mode,CKP = 0
SPI1IMSKbits.SPITBFEN = 1;   // SPI1 transmit buffer full generates interrupt event
_SPI1TXIE = 1;               // Enable interrupts
SPI1CON1bits.ENHBUF = 1;
SPI1CON1bits.ON = 1;
// from here, the device is ready to receive and transmit data