56.21 QSPI Electrical Specifications

Figure 56-7. QSPI SDR Host Mode 0,1,2,3 Module Timing Diagram

Figure 56-8. QSPI DDR Mode 0 Write Timing Diagram

Figure 56-9. QSPI DDR Mode 0 Read Timing Diagram

Table 56-27. QSPI Module Electrical Specifications ⁽¹⁾
AC CHARACTERISTICS			Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +125°C for Extended Temperature
Param. No.	Symbol	Characteristics	Min.	Typ.	Max.	Units	Conditions
QSPI_19	TDIS	Data In Setup Time	4.3	—	—	ns	VDD= 3.3V Host SDR mode 0
			4.71	—	—	ns	VDD= 3.3V Host SDR mode 1
			4.26	—	—	ns	VDD= 3.3V Host SDR mode 2
			4.73	—	—	ns	VDD= 3.3V Host SDR mode 3
			4.3	—	—	ns	VDD= 3.3V Host DDR mode 0
QSPI_25	TDOV	Data Out Valid	—	—	2.6	ns	VDD=3.3V Host SDR mode 0
			—	—	2.96	ns	VDD= 3.3V Host SDR mode 1
			—	—	2.43	ns	VDD= 3.3V Host SDR mode 2
			—	—	2.93	ns	VDD= 3.3V Host SDR mode 3
			—	—	2.45	ns	VDD= 3.3V Host DDR mode 0
Note: Assumes VDD(MAX) and 20pF external load on all QSPI pins unless otherwise noted.

Table 56-28. QSPI Maximum Frequency Example ⁽¹⁾
AC CHARACTERISTICS			Standard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated) Operating temperature: -40°C ≤ T_A ≤ +125°C for Extended Temperature
QSPI Mode	CLK_QSPI2X_AHB	CLK_QSPI_AHB	Max. f_CPU	Max. QSPI Serial Clock Frequency ⁽²⁾	Conditions
SDR	X	100 MHz	100 MHz	50 MHz	BAUD.BAUD[7:0] must be greater than 0 to ensure QSPI clock frequency is as per electrical specifications provided
SDR	X	75 MHz	75 MHz	75 MHz	-
DDR	132 MHz	66 MHz	66 MHz	66 MHz	MCLK: HSDIV.DIV=0x01 MCLK: CPUDIV.DIV=0x02
Note: Examples shown do not supersede the electrical specification shown in QSPI Module Electrical Specifications table. Refer to QSPI_1 for maximum QSPI Serial Clock Frequency (FCLK) in SDR and DDR modes.

PIC32CX SG41/SG60/SG61 Family Data Sheet