56.18 SPI Electrical Specifications

Figure 56-1. SPI Host Module (CPHA=0) Timing Diagrams
Figure 56-2. SPI Host Module (CPHA=1) Timing Diagrams
Table 56-22. SPI Module Host Mode Electrical Specifications (1)
AC CHARACTERISTICSStandard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +125°C for Extended Temperature

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
MSP_15TMISMISO Setup Time of Data Input to SCK19.5——nsVDD(min), CLOAD=20pF(MAX)
MSP_19SPI_GCLKSERCOM SPI input clock freq, GCLK_SPI——FCLK_23MHzFCLK_23: Refer to

Maximum Clock Frequencies Electrical Specifications

Note:
  1. Assumes VDD(min) and 20pF external load on all SPIx pins unless otherwise noted.
Figure 56-3. SPI Client Module (CPHA=0) Timing Diagrams
Figure 56-4. SPI Client Module (CPHA=1) Timing Diagrams
Table 56-23. SPI Module Client Mode Electrical Specifications (1)
AC CHARACTERISTICSStandard Operating Conditions: VDD = AVDD = 1.71V to 3.63V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +125°C for Extended Temperature

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
SSP_11TSOVMOSI Data Output Valid after SCK——16.5nsVDD(min),

CLOAD=20pF(MAX)

FCLK_5: Refer to

Maximum Clock Frequencies Electrical Specifications

SSP_15TSISMISO Setup Time of Data Input to SCK7.7——ns
SSP_19TSSSSS setup to SCK (PRELOADEN=1)(2/FCLK_5)+(1/FSCK)——ns
SSP_23SPI_GCLKSERCOM SPI input clock freq, GCLK_SPI——FCLK_23MHzFCLK_23: Refer to

Maximum Clock Frequencies Electrical Specifications

Note:
  1. Assumes VDD(min) and 20pF external load on all SPI pins unless otherwise noted.