29.4.8.4 Output Timing
All triggers, interrupts and data strobe outputs are internally asserted by the PTG state machine when the corresponding step command execution starts (i.e., before any additional time specified by the step delay timer) on the rising edge of the PTG execution clock.
In Pulse mode (PTGTOGL = 0
), the width of the trigger output signals is
determined by the PTGPWD[3:0] bits (PTGCON[23:20]) and can be any value between 1 and 16
PTG clock cycles. The default value is one PTG clock cycle.
Refer to TRIG Negation When PTGTOGL =
1
when
operating in Toggle mode (PTGTOGL = 1
).
When globally controlled by the ‘PTGCTRL 0b1111
’ broadcast trigger
command, the TRIG output pulse width is determined by the PTGPWD[3:0] bits
(PTGCON[23:20]) and can be any value between 1 and 16 PTG clock cycles. The default
value is one PTG clock cycle.
PTGCTRL
0b1111
’ broadcast trigger command can only operate in Pulse mode (i.e.,
PTGTOGL = ‘don’t care’).