18.2 Architectural Overview

The analog inputs are connected through multiplexers and switches to the Sample-and-Hold (S&H) circuit of the ADC core. The core uses the settings channel information (the output format, the measurement mode and the input number) to process the analog sample. When conversion is complete, the result is stored in the result buffer for the specific channel and passed to the digital filter and digital comparator if they were configured.

The ADC provides each settings channel the ability to specify its own trigger source. This capability allows the ADC to sample and convert analog inputs that are associated with PWM Generators operating on independent time bases.

A simplified block diagram of the 12-bit ADC is illustrated in Figure 18-1.

Figure 18-1. ADC Module Block Diagram
Note: Band Gap Reference (VBG) is an internal analog input and is not available on device pins.