22.2 Architectural Overview

The SPI module is a synchronous serial communication interface used for short distances in embedded systems.

SPI devices communicate in Full Duplex mode using a host/client architecture with a single host. The host device originates the frame for reading and writing. Multiple Client devices may be supported through selection with individual chip select (SSx) lines.

The SPI serial interface consists of four pins:

  • SDIx: Serial Data Input
  • SDOx: Serial Data Output
  • SCKx: Shift Clock Input or Output
  • SSx: Active-Low Client Select or Frame Synchronization I/O Pulse

During each SPI clock cycle, a full-duplex data transmission occurs. The host sends a bit on the SDO line and the client reads the bit, while the client sends a bit on the SDI line and the host reads the bit. This sequence is the same for one-directional data transfer.

The SPI module offers the following operating modes:

  • 8-bit, 16-bit and 32-bit Data Transmission modes
  • 8-bit, 16-bit and 32-bit Data Reception modes
  • Host and Client modes
  • Framed SPI modes
  • Audio Protocol Interface mode

Figure 22-1 shows the block diagram of the SPI module.

Figure 22-1. SPIx Module Block Diagram
Note:
  1. The SPIx Receive Buffer (SPIxRXB) and SPIx Transmit Buffer (SPIxTXB) registers are accessed through the SPIxBUF register and are multi-element FIFO buffers in Enhanced Buffer mode.
  2. The SPIx Shift register is not directly accessible by application software.