40.2 General Operating Ratings and Thermal Conditions

Table 40-2. Operating Frequency Vs. Voltage
Param. No.VDDIO, VDDIN, AVDD RangeTemp. Range (in °C)Max MCU FrequencyComments
DC_72.7 to 5.5V(1)-40°C to +125°C48 MHzExtended
Note:
  1. With BODVDD disabled. If BODVDD is enabled, refer to the REG_47 parameter.
Table 40-3. MCU Thermal Operating Conditions
RatingSymbolMin.Typ.Max.Unit
Extended Temperature Range Operating Ambient Temperature Range Operating Junction Temperature RangeTA

TJ

-40

125

145

°C

°C

Power Dissipation:

Internal Chip Power Dissipation:

PINT = (VDD x (IDD –∑ IOHVDD)) + (VDDIO x (IDD –∑ IOHVDDIO))

I/O Pin Power Dissipation:

∑ ((VDD – VOH) x IOHVDD) + ∑ (VOL X IOLVDD) + ∑ ((VDDIO – VOH) x IOHVDDIO) + ∑ (VOL x IOLVDDIO)

PDPINT + PI/OW
Maximum Allowed Power DissipationPDMAX(TJ – TA)/θJAW
Table 40-4. Thermal Packaging Characteristics(1)
CharacteristicsSymbolTyp.Max.Unit
Thermal Resistance, 32-pin TQFP (7x7x1 mm) PackageθJA63.1°C/W
Thermal Resistance, 48-pin TQFP (7x7x1 mm) PackageθJA62.7°C/W
Thermal Resistance, 64-pin TQFP (10x10x1 mm) PackageθJA56.3°C/W
Thermal Resistance, 32-pin VQFN (5x5x1 mm) PackageθJA40.9°C/W
Thermal Resistance, 48-pin VQFN (7x7x0.9 mm) PackageθJA30.9°C/W
Thermal Resistance, 64-pin VQFN (9x9x1 mm) PackageθJA31.4°C/W
Note:
  1. Junction to ambient thermal resistance, Theta-JA (θJA) numbers are achieved by package simulations.