40.3 Power Supply

Table 40-5. Power Supply DC Electrical Specifications
DC CHARACTERISTICSStandard Operating Conditions: VDD and VDDIO 2.7V to 5.5V (unless otherwise stated)

Operating temperature:

-40°C ≤ TA ≤ +125°C for Extended Temp

Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions
REG_47VBODVDD(4,5)VDD BOD (All modes)(4,5)2.44—3.0V(Default Setting) LEVEL[ 5:0] = 0x8(4) HYST[0] = 0x0
2.44—3.08V(Default Setting) LEVEL[5:0] = 0x8(4,5) HYST[0] = 0x1
4.1—4.85VLEVEL[ 5:0] = 0x2C(4) HYST[0] = 0x0
4.1—4.92VLEVEL[ 5:0] = 0x2C(4,5) HYST[0] = 0x1
Note:
  1. All bypass caps should be located immediately adjacent to pins and on the same side of the PCB as the MCU.
  2. In single power supply configuration, only one bulk capacitor (REG_4 or REG_7) is enough for both VDDIN and VDDIO. In dual-power supply configuration, two bulk capacitors are needed: REG_4 for VDDIO and REG_7 for VDDIN.
  3. VDDIN and AVDD must be at the same voltage level. VDDIO should be lower or equal to VDDIN/AVDD. The common voltage is referred to as VDD in the data sheet. Some I/O are in the VDDIO cluster, but can be multiplexed as analog inputs or outputs (e.g., PTC.X[n] pads). In such a case, AVDD is used to power the I/O. Using this configuration may result in an electrical conflict if the VDDIO voltage is lower than the VDDIN/AVDD.
  4. VBODVDD(min) = 2.076 + d(BODVDD.LEVEL[5:0]) * 0.046.
  5. VBODVDD(max) at BODVDD.HYST[0] = 1 = VBODVDD(max) at BODVDD.HYST[0] = 0 + VBODVDDHYST_STEP

    VBODVDDHYST_STEP Graph:

  6. Shared between VDDIO, VDDIN, and AVDD in case of a common power supply VDDIO = VDDIN = AVDD.
  7. Shared between VDDIO, VDDIN, and AVDD in case of a common power supply VDDIO = VDDIN = AVDD. Else, shared between VDDIN = AVDD.