32.31 MPDDRC Write Protection Status Register

Bit 31 – ECLASS Software Error Class (cleared on read)

0 (WARNING): An abnormal access that does not affect system functionality is performed.

1 (ERROR): An access is performed into some registers after memory device initialization sequence.

Value	Name	Description
0	READ_WO	A write-only register has been read (warning).
1	WRITE_RO	MPDDRC is enabled and a write access has been performed on a read-only register (warning).
2	UNDEF_RW	Access to an undefined address (warning).
3	W_AFTER_INIT	Abnormal use of MPDDRC user interface when memory device is already configured and initialized, i.e., if MPDDRC_RTR.COUNT > 0 (error).

When WPVS = 1, WPVSRC indicates the register address offset at which a write access has been attempted.

Value	Description
0	No software error has occurred since the last read of MPDDRC_WPSR.
1	A software error has occurred since the last read of MPDDRC_WPSR. The field SWE details the type of software error. The associated incorrect software access is reported in the field WPVSRC (if WPVS=0).

Value	Description
0	No peripheral internal sequencer error has occurred since the last read of MPDDRC_WPSR.
1	A peripheral internal sequencer error has occurred since the last read of MPDDRC_WPSR. This flag can only be set under abnormal operating conditions.

Value	Description
0	The clock monitoring circuitry has not been corrupted since the last read of MPDDRC_WPSR. Under normal operating conditions, this bit is always cleared.
1	The clock monitoring circuitry has been corrupted since the last read of MPDDRC_WPSR. This flag can only be set in case of an abnormal clock signal waveform (glitch).

Value	Description
0	No write protection violation occurred since the last read of this register (MPDDRC_WPSR).
1	A write protection violation occurred since the last read of this register (MPDDRC_WPSR). If this violation is an unauthorized attempt to write a control register, the associated violation is reported into the WPVSRC field.