32.28 MPDDRC Interrupt Status Register
| Name: | MPDDRC_ISR |
| Offset: | 0xCC |
| Reset: | – |
| Property: | Read-only |
| Bit | 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | |
| Access | |||||||||
| Reset |
| Bit | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | |
| Access | |||||||||
| Reset |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| Access | |||||||||
| Reset |
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| RD_ERR | SEC | ||||||||
| Access | R | R | |||||||
| Reset | – | – |
Bit 1 – RD_ERR Read Error
| Value | Description |
|---|---|
| 0 |
There is no error during memory check. |
| 1 |
There is one error during memory check. |
Bit 0 – SEC Security and /or Safety Event
| Value | Description |
|---|---|
| 0 |
There is no security report in MPDDRC_WPSR. |
| 1 |
One security flag is set in MPDDRC_WPSR. |