3.2.13 DIAG_GLCK

The DIAG_GCLK module is designed to verify the correct functionality of the Generic Clock (GCLK) through a set of C function calls.

Note: This module contains routines which sets the main clock at 48 MHz. The user would need to call DIAG_OSCCTRL_Initialize to restore the clock.

The DIAG_GCLK software test API is mapped to the following safety mechanisms:

Table 3-14.
Function	Diagnostic Mechanism	Use Case	Elapsed Time (μs)~
DIAG_GCLK_ClockCalibration()	GENERIC_CLOCK_CALIBRATION	POST	1144.62
DIAG_GCLK_SFRReset()	SFR_RESET_STATE	POST	185.97
DIAG_GCLK_SFRWriteRead()	SFR_WRITE_READ	POST / OnDemand	261.72

Configuring the Diagnostic

DIAG_GCLK does not require additional configuration.

Run-time Pre-requisites

DIAG_GLCK_SFRRead should be executed before DIAG_GCLK_SFRWriteRead

Using the Diagnostic

#include "definitions.h"

DIAG_TEST_STATUS DIAG_GCLK_SFRPost(void)
{
    DIAG_TEST_STATUS result[NO_OF_GCLK_SFRPOST_TESTS]; 
    DIAG_TEST_STATUS test_status = DIAG_TEST_FAILED;
    int i;
    
    result[0] = DIAG_GCLK_SFRReset(NULL,0,false);
    result[1] = DIAG_GCLK_SFRWriteRead(NULL,0,false);    
    for(i=0; i < NO_OF_GCLK_SFRPOST_TESTS; i++)
    {
        if (result[i] != DIAG_TEST_PASSED)
        {
            test_status = result[i];
            break;
        }        
        else
        {
            test_status = DIAG_TEST_PASSED;
        }
    }
    return test_status;
}


DIAG_TEST_STATUS DIAG_GCLK_Post(DIAG_GCLK_PERIPHS gclk_periph)
{
    // expected_freq should be in range of MCLK with div [Ex:(gclk_periph, 6000000) with div =8].
    // Asuming MCLK is at 48MHz
    return DIAG_GCLK_ClockCalibration(gclk_periph, 6000000);
}