3.2.27 DIAG_TCC

The DIAG_TCC module is designed to verify the correct functionality of the Timer Controller for Control Application (TCC) through a set of C function calls.

The DIAG_TCC software test API is mapped to the following safety mechanisms:

#define TCC_HW_LOOP_CNTR            0x10U
#define TCC_MAX_CLOCKS_DIFF         0x5U

typedef enum diag_tcc_nums {
    DIAG_TCC0_NUM = 0,
    DIAG_TCC1_NUM = 1,
    DIAG_TCC2_NUM = 2,
    DIAG_TCC_MAX
}DIAG_TCC_NUMBERS;

typedef enum diag_tcc_periphs {
    DIAG_TCC0_PERIPH = 1<<DIAG_TCC0_NUM,
    DIAG_TCC1_PERIPH = 1<<DIAG_TCC1_NUM,
    DIAG_TCC2_PERIPH = 1<<DIAG_TCC2_NUM,
}DIAG_TCC_PERIPHS;

typedef struct {
    bool ovf_set;
    bool ovf_clrd;
    bool cb;
}tcc_int_status;
    
#define DIAG_TCC_PERIPHS_CHECK_VALUE     ((uint32_t)DIAG_TCC0_PERIPH | (uint32_t)DIAG_TCC1_PERIPH | (uint32_t)DIAG_TCC2_PERIPH)

extern uint32_t tcc0_cntr, tcc0_curr_cntr, tcc0_prev_cntr, tc0_cntr, tc0_curr_cntr;
extern uint32_t tc0_prev_cntr, tcc0_tc0_curr_diff, tcc0_tc0_prev_diff;
extern tcc_int_status tcc0_ints;

extern uint32_t tcc1_cntr, tcc1_curr_cntr, tcc1_prev_cntr, tc1_cntr, tc1_curr_cntr;
extern uint32_t tc1_prev_cntr, tcc1_tc1_curr_diff, tcc1_tc1_prev_diff;
extern tcc_int_status tcc1_ints;

extern uint32_t tcc2_cntr, tcc2_curr_cntr, tcc2_prev_cntr, tc2_cntr, tc2_curr_cntr;
extern uint32_t tc2_prev_cntr, tcc2_tc2_curr_diff, tcc2_tc2_prev_diff;
extern tcc_int_status tcc2_ints;

Configuring the Diagnostic

TCC Safe-Plib can be configured as illustrated to supported to support all diagnostics:

Configuring the System

Using the Diagnostic

#include "definitions.h"

DIAG_TEST_STATUS DIAG_TCC_SFRPost ( DIAG_TCC_PERIPHS tcc_periph )
{
    DIAG_TEST_STATUS result;
    
    result = DIAG_TCC_SFRReset(tcc_periph,NULL,0,false);
    if( result == DIAG_TEST_PASSED )
    {   
        result = DIAG_TCC_SFRWriteRead(tcc_periph,NULL,0,false);
    }

    return result; 
}


DIAG_TEST_STATUS DIAG_TCC_Post ( DIAG_TCC_PERIPHS tcc_periph )
{
    DIAG_TEST_STATUS result;
    
    result = DIAG_TCC_Enable( tcc_periph );
    if( result == DIAG_TEST_PASSED )
    {
        result = DIAG_TCC_Disable( tcc_periph );
        if( result == DIAG_TEST_PASSED )
        {
            result = DIAG_TCC_SyncBusy( tcc_periph );
            if( result == DIAG_TEST_PASSED )
            {
                result = DIAG_TCC_Interrupts( tcc_periph );
                if( result == DIAG_TEST_PASSED )
                {
                    result = DIAG_TCC_DMA( tcc_periph, DMAC_CHANNEL_5 );   // DMA channel must match one set up in MCC
                    if( result == DIAG_TEST_PASSED )
                    {
                        result = DIAG_TCC_RedundantTimer( tcc_periph );
                    }
                }
            }
        }
    }
    return result; 
}