3.2.16 DIAG_OSC32KCTRL
The DIAG_OSC32KCTRL module is designed to verify the correct functionality of the Oscillators Controller (OSC32KCTRL) through a set of C function calls.
Note: This module contains routines which sets the main clock at
48 MHz. The user would need to call DIAG_OSCCTRL_Initialize to restore the
clock.
The DIAG_OSC32KCTRL software test API is mapped to the following safety mechanisms:
| Function | Diagnostic Mechanism | Use Case | Elapsed Time (μs)~ |
|---|---|---|---|
| DIAG_OSC32KCTRL_ClkSwitch() | OSC32KCTRL_CLOCK_SWITCH | POST | 5232 |
| DIAG_OSC32KCTRL_ClkSwitchDueToCFD() | OSC32KCTRL_CLOCK_FAILURE_DETECTION | POST / OnDemand | 4122 |
| DIAG_OSC32KCTRL_FreqCalibration() | OSC32KCTRL_CLOCK_CALIBRATION | POST | 7477.85 |
| DIAG_OSC32KCTRL_Interrupts() |
OSC32KCTRL_INTERRUPTS | POST | 144 |
| DIAG_OSC32KCTRL_OSC32KDisable() | OSC32K_DISABLE | POST | 3.35 |
| DIAG_OSC32KCTRL_OSC32KEnable() | OSC32K_ENABLE | POST | 3.33 |
| DIAG_OSC32KCTRL_SFRReset() | SFR_RESET | POST | 18.84 |
| DIAG_OSC32KCTRL_SFRWriteRead() | SFR_WRITE_READ | POST / OnDemand | 23.62 |
| DIAG_OSC32KCTRL_Startup() | OSC32KCTRL_STARTUP | POST | 2311 |
| DIAG_OSC32KCTRL_XOSC32KDisable() | XOSC32K_DISABLE | POST | 4.12 |
| DIAG_OSC32KCTRL_XOSC32KEnable() | XOSC32K_ENABLE | POST | 4.31 |
Configuring the Diagnostic
DIAG_OSC32KCTRL does not require additional configuration.
Using the Diagnostic
#include "definitions.h"
DIAG_TEST_STATUS DIAG_OSC32KCTRL_SFRPost(void)
{
DIAG_TEST_STATUS result;
result = DIAG_OSC32KCTRL_SFRReset(NULL,0,false);
if (result == DIAG_TEST_PASSED)
{
result = DIAG_OSC32KCTRL_SFRWriteRead(NULL,0,false);
}
return result;
}
OSC32KCTRL_RESET_STATES __attribute__((section(".persist"))) osc32kctrl_reset_state;
DIAG_TEST_STATUS __attribute__((section(".persist"))) osc32Kctrl_result[NO_OF_OSC32KCTRL_POST_TESTS];
DIAG_TEST_STATUS DIAG_OSC32KCTRL_Post( DIAG_OSC32K_PERIPHS src )
{
DIAG_TEST_STATUS test_status = DIAG_TEST_FAILED;
switch( src )
{
case DIAG_OSC32KCTRL:
test_status = DIAG_OSC32KCTRL_Interrupts();
break;
case DIAG_OSC32K_SRC:
test_status = DIAG_OSC32KCTRL_OSC32KEnable();
if( test_status == DIAG_TEST_PASSED )
{
test_status = DIAG_OSC32KCTRL_OSC32KDisable();
if( test_status == DIAG_TEST_PASSED )
{
test_status = DIAG_OSC32KCTRL_Startup(DIAG_OSC32K);
if( test_status == DIAG_TEST_PASSED )
{
test_status = DIAG_OSC32KCTRL_FreqCalibration(DIAG_OSC32K);
}
}
}
break;
case DIAG_XOSC32K_SRC:
test_status = DIAG_OSC32KCTRL_XOSC32KEnable();
if(test_status == DIAG_TEST_PASSED )
{
test_status = DIAG_OSC32KCTRL_XOSC32KDisable();
if( test_status == DIAG_TEST_PASSED )
{
test_status = DIAG_OSC32KCTRL_Startup(DIAG_XOSC32K);
if( test_status == DIAG_TEST_PASSED )
{
test_status = DIAG_OSC32KCTRL_FreqCalibration(DIAG_XOSC32K);
}
}
}
break;
case DIAG_OSCULP32K_SRC:
if( DIAG_OSC32KCTRL_FreqCalibration(DIAG_OSCULP32K) == DIAG_TEST_PASSED )
{
test_status = DIAG_TEST_PASSED;
}
break;
default:
break;
}
return test_status;
}
