2.3.8 Power-Up To Functional (PUFT) Timing Data Report

The information about PUFT timing data is available in the Design Initialization Data and Memories report of the Libero SoC. To indicate the completion of initialization of each block, such as PCIE, XCVR, and RAMs, a signal is asserted as part of device initialization after power-up. For example, the PCIE_INIT_DONE signal is asserted after all the PCIE-related registers are configured. The last signal that is asserted is DEVICE_INIT_DONE. The PUFT timing parameters such as TPCIE, TXCVR, TLSRAM, and TUSRAM are included in the PUFT timing data report. For information, see the respective PolarFire FPGA Datasheet , RT PolarFire FPGA Datasheet , PolarFire SoC FPGA Datasheet , or RT PolarFire SoC FPGA Datasheet .

In cases of PCIE and XCVR blocks, the number of instructions used to initialize the registers of that block is counted after FABRIC_POR is asserted in each case. Software implementation of PUF timing for any signal is a product of ‘number of instructions’ and a constant. This number is added to the report for every signal.

PUFTsignal = (Number_Of_Instructions × Constant ) ns

In the case of SRAM and µSRAM blocks, the amount of time taken to initialize varies from the number of blocks measured on a device. This average time to initialize one block is used to compute the PUF timing of that signal. There is a constant time taken by the system controller to copy the data to initialize the first block (Constant_Copy_Time). When the first block is being initialized, the data for initializing the second block is copied in the background.

PUFTsignal = Constant_Copy_Time + (Number_Of_Blocks × Average_Time_to_Init_One_Block ) ns

These signals are asserted in a sequence so the PUFT timing for each signal depends on:

  • The previous block(s) in the sequence being instantiated in the user design (or not)
  • The configuration of the block (Some configurations may need a few additional registers.)

SRAMs and µSRAMs can be initialized from different storage locations (sNVM, UPROM, and SPI). In the case of SPI, additional data needs to be collected depending on the SPI clock divider value and the encryption type selected.