17.7.5 I/O Macros
BIBUF
BIBUF is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Bidirectional Buffer, High Slew (with Hidden Buffer at Y pin)
- Input: D, E, PAD
- Output: PAD, Y
- Family: All
- I/O Tiles: 1
| MODE | E | D | PAD | Y |
|---|---|---|---|---|
| OUTPUT | 1 | X | D | D |
| INPUT | 0 | X | X | PAD |
| Attribute | Default Value | |
|---|---|---|
| ProASIC3 | ProASIC3E | |
| IO_THRESH | LVTTL | LVTTL |
| OUT_DRIVE | 12 | 12 |
| SLEW | HIGH | HIGH |
| SKEW | OFF | OFF |
| IN_DELAY | N/A | OFF |
| SCHMITT_TRIGGER | N/A | OFF |
| RES_PULL | NONE | NONE |
CLKBUF
CLKBUF is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Input for Dedicated Routed Clock Network
- Input: PAD
- Output: Y
- Family: All
- I/O Tiles: 1
| PAD | Y |
|---|---|
| 0 | 0 |
| 1 | 1 |
| Attribute | Default Value | |
|---|---|---|
| ProASIC3 | ProASIC3E | |
| IO_THRESH | LVTTL | LVTTL |
| IN_DELAY | N/A | OFF |
| SCHMITT_TRIGGER | N/A | OFF |
| RES_PULL | NONE | NONE |
INBUF
INBUF is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Input Buffer
- Input: PAD
- Output: Y
- Family: All
- I/O Tiles: 1
| PAD | Y |
|---|---|
| 0 | 0 |
| 1 | 1 |
| Attribute | Default Value | |
|---|---|---|
| ProASIC3 | ProASIC3E | |
| IO_THRESH | LVTTL | LVTTL |
| IN_DELAY | N/A | OFF |
| SCHMITT_TRIGGER | N/A | OFF |
| RES_PULL | NONE | NONE |
OUTBUF
OUTBUF is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Output Buffer, High Slew
- Input: D
- Output: PAD
- Family: All
- I/O Tiles: 1
| D | PAD |
|---|---|
| 0 | 0 |
| 1 | 1 |
| Attribute | Default Value | |
|---|---|---|
| ProASIC3 | ProASIC3E | |
| IO_THRESH | LVTTL | LVTTL |
| OUT_DRIVE | 12 | 12 |
| SLEW | HIGH | HIGH |
| RES_PULL | NONE | NONE |
TRIBUFF
TRIBUFF is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Tristate Output, High Slew
- Input: D, E
- Output: PAD
- Family: All
- I/O Tiles: 1
| D, E | PAD |
|---|---|
| 0 | Z |
| 1 | D |
| Attribute | Default Value | |
|---|---|---|
| ProASIC3 | ProASIC3E | |
| IO_THRESH | LVTTL | LVTTL |
| OUT_DRIVE | 12 | 12 |
| SLEW | HIGH | HIGH |
| SKEW | OFF | OFF |
| RES_PULL | NONE | NONE |
IGLOO, Fusion and ProASIC3 Input I/O Macros
Names for the input buffers are composed of up to 4 parts:
- A base name indicating the type of buffer: INBUF
- I/O Technology like LVCMOS
- An optional number code 33, 25, 18 or 15 indicating a 3.3, 2.5, 1.8 OR 1.5 voltage level.
- An optional one character code (U/D) designating a pull-up/down resistor. When the buffer has no resistor, this code is omitted.
For example:
- INBUF_LVCMOS25U - An input LVCMOS buffer with 2.5 CMOS voltage levels, pull-up resistor.
- INBUF_PCIX - An input PCIX buffer
INBUF_X
INBUF_X is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Global Input Buffer, 1.2V I/Os are not available for Fusion, ProASIC3 or ProASIC3E
- Input: PAD
- Output: Y
- Family: All
- I/O Tiles: 1
| PAD | Y |
|---|---|
| 0 | 0 |
| 1 | 1 |
| Name | Description |
|---|---|
| INBUF_LVCMOS5 | LVCMOS Input buffer with 2.5V CMOS voltage level, 5.0V tolerant; the A3P030 device does not support INBUF_LVCMOS5, INBUF_LVCMOS5D, or INBUF_LVCMOS5U † |
| INBUF_LVCMOS5D | LVCMOS Input buffer with 2.5V CMOS voltage level, pull-down resistor, 5.0V tolerant; the A3P030 device does not support INBUF_LVCMOS5, INBUF_LVCMOS5D, or INBUF_LVCMOS5U † |
| INBUF_LVCMOS5U | LVCMOS Input buffer with 2.5V CMOS voltage level, pull-up resistor, 5.0V tolerant; the A3P030 device does not support INBUF_LVCMOS5, INBUF_LVCMOS5D, or INBUF_LVCMOS5U † |
| INBUF_LVCMOS33 | LVCMOS Input buffer with 3.3 CMOS voltage level |
| INBUF_LVCMOS33U | LVCMOS Input buffer with 3.3 CMOS voltage level, pull-up resistor |
| INBUF_LVCMOS33D | LVCMOS Input buffer with 3.3 CMOS voltage level, pull-down resistor |
| INBUF_LVCMOS25 | LVCMOS Input buffer with 2.5 CMOS voltage level* |
| INBUF_LVCMOS25U | LVCMOS Input buffer with 2.5 CMOS voltage level, pull-up resistor* |
| INBUF_LVCMOS25D | LVCMOS Input buffer with 2.5 CMOS voltage level, pull-down resistor* |
| INBUF_LVCMOS18 | LVCMOS Input buffer with 1.8 CMOS voltage level |
| INBUF_LVCMOS18U | LVCMOS Input buffer with 1.8 CMOS voltage level, pull-up resistor |
| INBUF_LVCMOS18D | LVCMOS Input buffer with 1.8 CMOS voltage level, pull-down resistor |
| INBUF_LVCMOS15 | LVCMOS Input buffer with 1.5 CMOS voltage level |
| INBUF_LVCMOS15U | LVCMOS Input buffer with 1.5 CMOS voltage level, pull-up resistor |
| INBUF_LVCMOS15D | LVCMOS Input buffer with 1.5 CMOS voltage level, pull-down resistor |
| INBUF_LVCMOS12 | LVCMOS Input buffer with 1.2 CMOS voltage level - EXCEPT Fusion, ProASIC3 and ProASIC3E |
| Name | Description |
|---|---|
| INBUF_LVCMOS12U | LVCMOS Input buffer with 1.2 CMOS voltage level, pull-up resistor - EXCEPT Fusion, ProASIC3 and ProASIC3E |
| INBUF_LVCMOS12D | LVCMOS Input buffer with 1.5 CMOS voltage level, pull-down resistor - EXCEPT Fusion, ProASIC3 and ProASIC3E |
| INBUF_PCI | PCI Input buffer † |
| INBUF_PCIX | PCIX Input buffer † |
| INBUF_GTL25 | GTL Input buffer with 2.5 CMOS voltage level* † |
| INBUF_GTL33 | GTL Input buffer with 3.3 CMOS voltage level* † |
| INBUF_GTLP25 | GTLP Input buffer with 2.5 CMOS voltage level* † |
| INBUF_GTLP33 | GTLP Input buffer with 3.3 CMOS voltage level* † |
| INBUF_HSTL_I | HSTL Class I Input buffer* † |
| INBUF_HSTL_II | HSTL Class II Input buffer* † |
| INBUF_SSTL2_I | SSTL2 Class I Input buffer* † |
| INBUF_SSTL2_II | SSTL2 Class II Input buffer* † |
| INBUF_SSTL3_I | SSTL3 Class I Input buffer* † |
| INBUF_SSTL3_II | SSTL3 Class II Input buffer* † |
| INBUF_A | Analog input buffer; you must connect the GNDREF and ATRTN01 - ATRTN89 pads (in the Analog Sys-tem Builder) to this buffer. You cannot use a generic INBUF in place of INBUF_A. |
| INBUF_DA | Digital or analog input buffer; you must connect the voltage, current, and temperature monitoring pads (from the Analog System Builder) to this macro. You cannot use a generic INBUF in place of INBUF_DA. |
| INBUF_FF | Flash*Freeze input buffer; Flash*Freeze is available only for low power devices: IGLOO PLUS, IGLOOe, IGLOO and ProASIC3L. See the Flash*Freeze section of the device handbook or the Libero IDE online help for more information on this macro and its implementation. |
† = not supported in IGLOO PLUS or SmartFusion
* = LVCMOS 2.5 V and LVCMOS 2.5 V / 5.0 V I/O standards are identical in the ProASIC3 family. For the A3P030 device, these standards have no clamp diode; therefore, they both behave like a LVCMOS 2.5 V standard. For other ProASIC3 devices, these standards have a clamp diode; therefore, they both behave like a LVCMOS 2.5 V / 5.0 V input standard.
Bi-Directional I/O Macros
Names for the bi-directional buffers are composed of up to 4 parts:
- A base name indicating the type of buffer: BIBUF
- Optional IO Technology like LVCMOS
- An optional number code indicating drive strength in milli-amps.
- An optional one character code (S/F) indicating high(F) slew or low(S) slew
- An optional one character code (U/D) designating a pull-up/down resistor. When the buffer has no resistor, this code is omitted.
For example:
- BIBUF_LVCMOS25U - A bi-directional LVCMOS buffer with 2.5 CMOS voltage levels, pull-up resistor
- BIBUF_S_8- A bi-directional buffer with low slew and 8 mA drive strength
BIBUF_X
BIBUF_X is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Bidirectional Buffer (with Hidden Buffer at Y pin), 1.2V I/Os are not available for Fusion, ProASIC3 or ProASIC3E
- Input: D, E, PAD
- Output: Y, PAD
- Family: All
- I/O Tiles: 1
| MODE | E | D | PAD | Y |
|---|---|---|---|---|
| OUTPUT | 1 | X | D | D |
| INPUT | 0 | X | X | PAD |
| Name | Description |
|---|---|
| BIBUF_LVCMOS33 | LVCMOS bi-directional buffer with 3.3 CMOS voltage level |
| BIBUF_LVCMOS33U | LVCMOS bi-directional buffer with 3.3 CMOS voltage level, pull-up resistor |
| BIBUF_LVCMOS33D | LVCMOS bi-directional buffer with 3.3 CMOS voltage level, pull-down resistor |
| BIBUF_LVCMOS25 | LVCMOS Bi-directional buffer with 2.5 CMOS voltage level |
| BIBUF_LVCMOS25U | LVCMOS Bi-directional buffer with 2.5 CMOS voltage level, pull-up resistor |
| BIBUF_LVCMOS25D | LVCMOS Bi-directional buffer with 2.5 CMOS voltage level, pull-down resistor |
| BIBUF_LVCMOS18 | LVCMOS Bi-directional buffer with 1.8 CMOS voltage level |
| BIBUF_LVCMOS18U | LVCMOS Bi-directional buffer with 1.8 CMOS voltage level, pull-up resistor |
| BIBUF_LVCMOS18D | LVCMOS Bi-directional buffer with 1.8 CMOS voltage level, pull-down resistor |
| BIBUF_LVCMOS15 | LVCMOS Bi-directional buffer with 1.5 CMOS voltage level |
| BIBUF_LVCMOS15U | LVCMOS Bi-directional buffer with 1.5 CMOS voltage level, pull-up resistor |
| BIBUF_LVCMOS15D | LVCMOS Bi-directional buffer with 1.5 CMOS voltage level, pull-down resistor |
| BIBUF_LVCMOS12 | LVCMOS Bi-directional buffer with 1.2 CMOS voltage level - EXCEPT Fusion, ProASIC3 and ProASIC3E |
| BIBUF_LVCMOS12U | LVCMOS Bi-directional buffer with 1.2 CMOS voltage level, pull-up resistor - EXCEPT Fusion, ProASIC3 and ProASIC3E |
| BIBUF_LVCMOS12D | LVCMOS Bi-directional buffer with 1.2 CMOS voltage level, pull-down resistor - EXCEPT Fusion, ProASIC3 and ProASIC3E |
| BIBUF_PCI | PCI Bi-directional buffer † |
| BIBUF_PCIX | PCIX Bi-directional buffer † |
| BIBUF_SSTL2_I | SSTL2 class I bi-directional buffer* † |
| BIBUF_SSTL2_II | SSTL2 class II bi-directional buffer* † |
| Name | Description |
|---|---|
| BIBUF_SSTL3_I | SSTL3 class I bi-directional buffer † |
| BIBUF_SSTL3_II | SSTL3 class II bi-directional buffer* † |
| BIBUF_HSTL_I | HSTL class I bi-directional buffer* † |
| BIBUF_HSTL_II | HSTL class II bi-directional buffer* † |
| BIBUF_GTL25 | GTL bi-directional buffer* † |
| BIBUF_GTL33 | GTL bi-directional buffer* † |
| BIBUF_GTLP25 | GTLP Bi-directional buffer with 2.5 CMOS voltage level* † |
| BIBUF_GTLP33 | GTLP Bi-directional buffer with 3.3 CMOS voltage level* † |
| BIBUF_F_2 | Bi-directional buffer with high slew |
| BIBUF_F_2U | Bi-directional buffer with high slew and pull-up resistor |
| BIBUF_F_2D | Bi-directional buffer with high slew and pull-down resistor |
| BIBUF_F_4 | Bi-directional buffer with high slew |
| BIBUF_F_4U | Bi-directional buffer with high slew and pull-up resistor |
| BIBUF_F_4D | Bi-directional buffer with high slew and pull-down resistor |
| BIBUF_F_6 | Bi-directional buffer with high slew |
| BIBUF_F_6U | Bi-directional buffer with high slew and pull-up resistor |
| BIBUF_F_6D | Bi-directional buffer with high slew and pull-down resistor |
| BIBUF_F_8 | Bi-directional buffer with high slew |
| BIBUF_F_8U | Bi-directional buffer with high slew and pull-up resistor |
| BIBUF_F_8D | Bi-directional buffer with high slew and pull-down resistor |
| BIBUF_F_12 | Bi-directional buffer with high slew |
| BIBUF_F_12U | Bi-directional buffer with high slew and pull-up resistor |
| BIBUF_F_12D | Bi-directional buffer with high slew and pull-down resistor |
| BIBUF_F_16 | Bi-directional buffer with high slew |
| BIBUF_F_16U | Bi-directional buffer with high slew and pull-up resistor |
| BIBUF_F_16D | Bi-directional buffer with high slew and pull-down resistor |
| BIBUF_F_24 | Bi-directional buffer with high slew † |
| BIBUF_F_24U | Bi-directional buffer with high slew and pull-up resistor † |
| BIBUF_F_24D | Bi-directional buffer with high slew and pull-down resistor † |
| BIBUF_S_2 | Bi-directional buffer with low slew |
| BIBUF_S_2U | Bi-directional buffer with low slew and pull-up resistor |
| BIBUF_S_2D | Bi-directional buffer with low slew and pull-down resistor |
| BIBUF_S_4 | Bi-directional buffer with low slew |
| BIBUF_S_4U | Bi-directional buffer with low slew and pull-up resistor |
| BIBUF_S_4D | Bi-directional buffer with low slew and pull-down resistor |
| BIBUF_S_6 | Bi-directional buffer with low slew |
| BIBUF_S_6U | Bi-directional buffer with low slew and pull-up resistor |
| BIBUF_S_6D | Bi-directional buffer with low slew and pull-down resistor |
| BIBUF_S_8 | Bi-directional buffer with low slew |
| BIBUF_S_8U | Bi-directional buffer with low slew and pull-up resistor |
| BIBUF_S_8D | Bi-directional buffer with low slew and pull-down resistor |
| BIBUF_S_12 | Bi-directional buffer with low slew |
| BIBUF_S_12U | Bi-directional buffer with low slew and pull-up resistor |
| BIBUF_S_12D | Bi-directional buffer with low slew and pull-down resistor |
| BIBUF_S_16 | Bi-directional buffer with low slew |
| BIBUF_S_16U | Bi-directional buffer with low slew and pull-up resistor |
| BIBUF_S_16D | Bi-directional buffer with low slew and pull-down resistor |
| BIBUF_S_24 | Bi-directional buffer with low slew † |
| BIBUF_S_24U | Bi-directional buffer with low slew and pull-up resistor † |
| BIBUF_S_24D | Bi-directional buffer with low slew and pull-down resistor † |
* = not supported in ProASIC3
† = not supported in IGLOO PLUS or SmartFusion
Clock Buffers
Names for the input buffers are composed of up to 3 parts:
- A base name indicating the type of buffer: CLKBUF
- IO Technology like LVCMOS
- An optional number code 33, 25, 18 or 15 indicating a 3.3, 2.5, 1.8 OR 1.5 voltage level
CLKBUF_X
CLKBUF_X is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Input for Dedicated Routed Clock Network 1.2V I/Os are not available for Fusion, ProASIC3 or ProASIC3E
- Input: PAD
- Output: Y
- Family: All
- I/O Tiles: 1
| PAD | Y |
|---|---|
| 0 | 0 |
| 1 | 1 |
Note: 1: For an internal Clock net, refer to the CLKINT macro.
| Name | Description |
|---|---|
| CLKBUF_LVCMOS5 | LVCMOS Clock buffer with 2.5V CMOS voltage level, 5.0V tolerant; the A3P030 device does not support CLKBUF_LVCMOS5 † |
| CLKBUF_LVCMOS33 | LVCMOS Clock buffer with 3.3 CMOS voltage level |
| CLKBUF_LVCMOS25 | LVCMOS Clock buffer with 2.5 CMOS voltage level * |
| CLKBUF_LVCMOS18 | LVCMOS Clock buffer with 1.8 CMOS voltage level |
| CLKBUF_LVCMOS15 | LVCMOS Clock buffer with 1.5 CMOS voltage level |
| CLKBUF_LVCMOS12 | LVCMOS Clock buffer with 1.2 CMOS voltage level - EXCEPT Fusion, ProASIC3 and ProASIC3E |
| CLKBUF_PCI | PCI Clock buffer † |
| CLKBUF_PCIX | PCIX Clock buffer † |
| CLKBUF_GTL25 | GTL Clock buffer with 2.5 CMOS voltage level * † |
| CLKBUF_GTL33 | GTL Clock buffer with 3.3 CMOS voltage level* † |
| CLKBUF_GTLP25 | GTLP Clock buffer with 2.5 CMOS voltage level * † |
| CLKBUF_GTLP33 | GTLP Clock buffer with 3.3 CMOS voltage level * † |
| CLKBUF_ HSTL _I | HSTL Class I Clock buffer * † |
| CLKBUF_ HSTL _II | HSTL Class II Clock buffer * † |
| CLKBUF_SSTL2_I | SSTL2 Class I Clock buffer * † |
| CLKBUF_SSTL2_II | SSTL2 Class II Clock buffer * † |
| CLKBUF_SSTL3_I | SSTL3 Class I Clock buffer * † |
| CLKBUF_SSTL3_II | SSTL3 Class II Clock buffer * † |
† = not supported in IGLOO PLUS or SmartFusion
* = LVCMOS 2.5 V and LVCMOS 2.5 V / 5.0 V I/O standards are identical in the ProASIC3 family. For the A3P030 device, these standards have no clamp diode; therefore, they both behave like a LVCMOS 2.5 V standard. For other ProASIC3 devices, these standards have a clamp diode; therefore, they both behave like a LVCMOS 2.5 V / 5.0 V input standard.
Output Buffers
Names for the bi-directional buffers are composed of up to 4 parts:
- A base name indicating the type of buffer: OUTBUF
- Optional IO Technology like LVCMOS
- An optional number code indicating drive strength in milli-amps.
- An optional one character code (S/F) indicating high (F) slew or low (S) slew
OUTBUF_X
OUTBUF_X is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Output Buffer 1.2V I/Os are not available for Fusion, ProASIC3 or ProASIC3E
- Input: D
- Output: PAD
- Family: All
- I/O Tiles: 1
| PAD | Y |
|---|---|
| 0 | 0 |
| 1 | 1 |
| Name | Description |
| OUTBUF_LVCMOS33 | LVCMOS Output buffer with 3.3 CMOS voltage level; Microchip® recommends that you use this buffer to drive a 5.0V receiver |
| OUTBUF_LVCMOS25 | LVCMOS Output buffer with 2.5 CMOS voltage level |
| OUTBUF_LVCMOS18 | LVCMOS Output buffer with 1.8 CMOS voltage level |
| OUTBUF_LVCMOS15 | LVCMOS Output buffer with 1.5 CMOS voltage level |
| OUTBUF_LVCMOS12 | LVCMOS Output buffer with 1.2 CMOS voltage level - EXCEPT Fusion, ProASIC3 and ProASIC3E |
| OUTBUF_PCI | PCI Output buffer † |
| OUTBUF_PCIX | PCIX Output buffer † |
| OUTBUF_ HSTL _I | HSTL Class I Output buffer * † |
| OUTBUF_ HSTL _II | HSTL Class II Output buffer * † |
| OUTBUF_SSTL2_I | SSTL2 Class I Output buffer * † |
| OUTBUF_SSTL2_II | SSTL2 Class II Output buffer * † |
| OUTBUF_SSTL3_I | SSTL3 Class I Output buffer * † |
| OUTBUF_SSTL3_II | SSTL3 Class II Output buffer * † |
| OUTBUF_GTL25 | GTL Output buffer with 2.5 CMOS voltage level * † |
| OUTBUF_GTL33 | GTL Output buffer with 3.3 CMOS voltage level * † |
| OUTBUF_GTLP25 | GTLP Output buffer with 2.5 CMOS voltage level * † |
| OUTBUF_GTLP33 | GTLP Output buffer with 3.3 CMOS voltage level * † |
| OUTBUF_F_2 | Output buffer with high slew |
| OUTBUF_F_4 | Output buffer with high slew |
| OUTBUF_F_6 | Output buffer with high slew |
| OUTBUF_F_8 | Output buffer with high slew |
| OUTBUF_F_12 | Output buffer with high slew |
| OUTBUF_F_16 | Output buffer with high slew |
| OUTBUF_F_24 | Output buffer with high slew † |
| OUTBUF_S_2 | Output buffer with low slew |
| OUTBUF_S_4 | Output buffer with low slew† |
| OUTBUF_S_6 | Output buffer with low slew |
| OUTBUF_S_8 | Output buffer with low slew |
| OUTBUF_S_12 | Output buffer with low slew |
| OUTBUF_S_16 | Output buffer with low slew |
| OUTBUF_S_24 | Output buffer with low slew † |
| OUTBUF_A | Analog output buffer. You must use this output buffer to indicate your analog outputs. You cannot use a generic OUTBUF in place of OUTBUF_A. |
† = not supported in IGLOO PLUS or SmartFusion
* = not supported in ProASIC3
Tri-State Buffer Macros
Names for the tri-state outputs are composed of up to 4 parts:
- A base name indicating the type of buffer: TRIBUFF
- Optional IO Technology like LVCMOS
- An optional number code indicating drive strength in milli-amps.
- An optional one character code (S/F) indicating high(F) slew or low(S) slew
- An optional one character code (U/D) designating a pull-up/down resistor. When the buffer has no resistor, this code is omitted.
For example:
- TRIBUFF_LVCMOS25U - A tri-state LVCMOS output with 2.5 CMOS voltage levels, pull-up resistor
- TRIBUFF_S_8- A tri-state output with low slew and 8 mA drive strength
TRIBUFF_X
TRIBUFF_X is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Tristate Output, 1.2V I/Os are not available for Fusion, ProASIC3 or ProASIC3E
- Input: D, E
- Output: PAD
- Family: All
- I/O Tiles: 1
| Name | Description |
|---|---|
| TRIBUFF_LVCMOS33 | LVCMOS tri-state output with 3.3 CMOS voltage level - Microchip® recommends that you use this buffer to drive a 5.0V receiver |
| TRIBUFF_LVCMOS25 | LVCMOS tri-state output with 2.5 CMOS voltage level |
| TRIBUFF_LVCMOS18 | LVCMOS tri-state output with 1.8 CMOS voltage level |
| TRIBUFF_LVCMOS15 | LVCMOS tri-state output with 1.5 CMOS voltage level |
| TRIBUFF_LVCMOS12 | LVCMOS tri-state output with 1.2 CMOS voltage level- EXCEPT Fusion, ProASIC3 and ProASIC3E |
| TRIBUFF_LVCMOS12U | LVCMOS tri-state output with 1.2 CMOS voltage level, pull-up resistor- EXCEPT Fusion, ProASIC3 and ProASIC3E |
| TRIBUFF_LVCMOS12D | LVCMOS tri-state output with 1.2 CMOS voltage level, pull-down resistor- EXCEPT Fusion, ProASIC3 and ProASIC3E |
| TRIBUFF_PCI | PCI tri-state output † |
| TRIBUFF_PCIX | PCIX tri-state output † |
| TRIBUFF_GTL25 | GTL tri-state output with 2.5 CMOS voltage level * † |
| TRIBUFF_GTL33 | GTL tri-state output with 3.3 CMOS voltage level * † |
| TRIBUFF_GTLP25 | GTLP tri-state output with 2.5 CMOS voltage level * † |
| TRIBUFF_GTLP33 | GTLP tri-state output with 3.3 CMOS voltage level * † |
| TRIBUFF_ HSTL _I | HSTL Class I tri-state output buffer * † |
| TRIBUFF_ HSTL _II | HSTL Class II tri-state output buffer * † |
| TRIBUFF_SSTL2_I | SSTL2 Class I tri-state output buffer * † |
| TRIBUFF_SSTL2_II | SSTL2 Class II tri-state output buffer * † |
| TRIBUFF_SSTL3_I | SSTL3 Class I tri-state output buffer * † |
| TRIBUFF_SSTL3_II | SSTL3 Class II tri-state output buffer * † |
| TRIBUFF_F_2 | Tri-state output with high slew |
| TRIBUFF_F_4 | Tri-state output with high slew |
| TRIBUFF_F_6 | Tri-state output with high slew |
| TRIBUFF_F_8 | Tri-state output with high slew |
| TRIBUFF_F_12 | Tri-state output with high slew |
| TRIBUFF_F_16 | Tri-state output with high slew |
| TRIBUFF_F_24 | Tri-state output with high slew* † |
| TRIBUFF_S_2 | Tri-state output with low slew |
| TRIBUFF_S_4 | Tri-state output with low slew |
| TRIBUFF_S_6 | Tri-state output with low slew |
| TRIBUFF_S_8 | Tri-state output with low slew |
| TRIBUFF_S_12 | Tri-state output with low slew |
| TRIBUFF_S_16 | Tri-state output with low slew |
| TRIBUFF_S_24 | Tri-state output with low slew * † |
† = not supported in IGLOO PLUS or SmartFusion
* = not supported in ProASIC3
TRIBUFF_X Macro Types
INBUF_LVDS; INBUF_LVPECL
INBUF_LVDS; INBUF_LVPECL are available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: INBUF_LVDS and INBUF_LVPECL, Except IGLOO PLUS
- Input: PADP, PADN
- Output: Y
| Name | Description |
|---|---|
| INBUF_LVDS | — |
| INBUF_LVPECL | — |
CLKBUF_LVDS; CLKBUF_LVPECL
CLKBUF_LVDS; CLKBUF_LVPECL are available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: CLKBUF_LVDS and CLKBUF_LVPECL, Except IGLOO PLUS
- Input: PADP, PADN
- Output: Y
| Name | Description |
|---|---|
| CLKBUF_LVDS | — |
| CLKBUF_LVPECL | — |
OUTBUF_LVDS; OUTBUF_LVPECL
OUTBUF_LVDS; CLKBUF_LVPECL are available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: OUTBUF_LVDS and OUTBUF_LVPECL, Except IGLOO PLUS
- Input: D
- Output: PADP, PADN
| Name | Description |
|---|---|
| OUTBUF_LVDS | — |
| OUTBUF_LVPECL | — |
BIBUF_LVDS
BIBUF_LVDS is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Bi-directional differential I/O, high slew, Except IGLOO PLUS
- Input: D, E, PADP, PADN
- Output: PADP, PADN, Y
- Family: All
- I/O Tiles: 2
| MODE | E | D | PAD | PADN | Y |
|---|---|---|---|---|---|
| OUTPUT | 1 | X | D | !D | D |
| INPUT | 0 | X | X | !PADP | PADP |
| Attribute | Default Value |
|---|---|
| IO_THRESH | LVDS |
| OUT_DRIVE | 12 |
| SLEW | HIGH |
| SKEW | OFF |
| IN_DELAY | OFF |
| SCHMITT_TRIGGER | NONE |
| RES_PULL | NONE |
TRIBUF_LVDS
TRIBUF_LVDS is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: Tri-state differential output, high slew, Except IGLOO PLUS
- Input: D, E
- Output: PADP, PADN
- Family: All
- I/O Tiles: 2
| E | D | PAD | PADN |
|---|---|---|---|
| 0 | X | Z | Z |
| 1 | X | D | !D |
| Attribute | Default Value |
|---|---|
| IO_THRESH | LVDS |
| OUT_DRIVE | 24 |
| SLEW | HIGH |
| SKEW | OFF |
| RES_PULL | NONE |
SIMBUF
SIMBUFis available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: SIMBUF is a VIRTUAL I/O used to bring out internal nets that are going to be connected to a top port in the design. This port is used exclusively for simulation. This virtual I/O is removed by Designer during compile, then readded in the back-annotated netlist.
- Input: D
- Output: PADP, PADN
- Family: All listed
- I/O Tiles: 0
| D | PAD |
|---|---|
| 0 | 0 |
| 1 | 1 |
DDR Macros
DDR_REG
DDR_REG is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: DDR (DDR) Register; please refer to the Fusion or ProASIC3 datasheets for more information on the DDR_REG
- Input: D, CLK, CLR
- Output: QR, QF
- Family: All
- I/O Tiles: 1
| CLR | CLK | QR(n+1) | QF(n+1) |
|---|---|---|---|
| 1 | X | 0 | 0 |
| 0 | ↑ | D | QF(n) |
| 0 | ↓ | QR(n) | !D |
DDR_OUT
DDR_OUT is available across the IGLOO®, ProASIC3, SmartFusion®, Fusion device families.
- Function: DDR (DDR) output; please refer to the Fusion or ProASIC3 datasheets for more information on the DDR_OUT
- Input: DR, DF, CLK, CLR
- Output: Q
- Family: All
- I/O Tiles: 1
| CLR | CLK | Q |
|---|---|---|
| 1 | X | 0 |
| 0 | ↑ | DR |
| 0 | ↓ | DF |