15.10.1.2 IGLOOe, Fusion, ProASIC3E, and Axcelerator

IGLOOe, Fusion, ProASIC3L (A3PE3000L) devices, ProASIC3E, and Axcelerator devices have eight I/O banks surrounding the chip, two per side, numbered 0-7. The I/O banks are color-coded for quick identification. You can change the default colors through the Display Settings dialog box.

Each I/O bank has a common:

  • VCCI, the supply voltage for its I/Os
  • VREF, the reference voltage (for voltage-referenced I/O standards)

Each VREF pin assigned to the same I/O bank must have the same value. For example, you cannot assign a VREF with a VCCI of 1.5 and another with a VCCI of 1.8V to the same I/O bank.

Only I/O standards compatible with the same VCCI and VREF standards can be assigned to the same bank.

The following table shows the required voltage values and their compatible I/O standards for and IGLOOe, Fusion, ProASIC3L (A3PE3000L), and ProASIC3E devices.

VCCICompatible I/O Standards
3.3VLVTTL, LVCMOS 3.3, PCI 3.3, SSTL3 (Class I & II), GTL+ 3.3, GTL 3.3, LVPECL
2.5VLVCMOS 2.5, LVCMOS 2.5/5.0, GTL+ 2.5, GTL 2.5, SSTL2 (Class I & II), LVDS
1.8VLVCMOS 1.8
1.5VLVCMOS 1.5, HSTL (Class I), HSTL (Class II)
1.2VLVCMOS 1.2 (see Note below)
Note: The low-power mode and input delay attributes are not available in the I/O Bank Settings dialog box for IGLOOe, Fusion, ProASIC3L (A3PE3000L), and ProASIC3 devices. Because these attributes are not available, the More Attributes button is also not available. Also, the 1.2 voltage is supported for ProASIC3 (A3PL), IGLOOe V2 only, IGLOO V2, and IGLOO PLUS.

The following table shows the required voltage values and their compatible I/O standards for Axcelerator devices.

VCCICompatible I/O Standards
3.3VLVTTL, PCI 3.3, SSTL3 (Class I & II), GTL+ 3.3, LVPECL
2.5VLVCMOS 2.5, GTL+ 2.5, SSTL2 (Class I & II), LVDS
1.8VLVCMOS 1.8
1.5VLVCMOS 1.5, HSTL (Class I)