13.7.10 HDL Templates in the Project Manager
Use the templates in the Libero IDE Project Manager to create HDL.
To use the templates included with the Project Manager, open your VHDL or Verilog file in the Project Manager text editor. Right-click, and select Language Templates.
Place the cursor where you want to add the template, browse the list of VHDL and Verilog templates, and double-click the template to add it to your design.
The VHDL and Verilog templates are useful if you want to modify your netlist but are unfamiliar with the language. The templates facilitate the writing of HDL files by inserting predefined language constructs. You can also save your own template files to reuse in other designs (for example, if you wanted to add the same header in all your files).
To create a user template:
- Import an HDL file as a template, or
- Save an open HDL file from the text editor as a template. To do so, right-click in the text editor and choose Export as Template.
