5.32.21 Generating Prototype Files

When designing for RTAX-S, you can use the Axcelerator family for prototyping. Please refer to the application note Prototyping RTAX-S Using Axcelerator Devices for more information.

Designer maps the pins from the RT package to the commercial prototyping vehicle.

To generate prototype files:

From the Designer Tools menu, choose Generate Prototype. This displays the Generate Prototype Files dialog box.
Set your Prototype Die/Package. The adapter socket required for prototyping varies depending on your target die/package.
For CQFB to FBGA, see the CQFB to FBGA Adapter Sockets application note. For CCGA to FBGA, see the CCGA to FBGA Adapter Sockets application note.
Set your Silicon Signature (optional) - Enter a 5 digit hexadecimal value in the Silicon Signature box to identify the design. Valid characters are '0' through '9', and 'a' through 'f'.

Select your Output directory. Click the Browse button to navigate to a directory.
Set options:
- Generate probe file also - This option automatically generates a PRB file for use with Silicon Explorer
  - Use the JTAG reset pull-up resistor - Select to enable pull-up resistors on the TRSTB pin (JTAG Reset pin which is active low). This is not part of the JTAG standard but can be useful if you want to make sure that the JTAG tap controller is not reset by mistake if the TRSTB pin is not connected. The pull-up resistor guarantees that if the pin is not driven to low (active), the pin is left in an inactive state (high).
  - Use the Global Set Fuse - Select to set flip-flops to a known state after power-up. If not selected all flip-flops are set to '0' at power up. If this option is used, all flip-flops are set to '1' at power up.
  1. Click OK. Designer runs through the process of creating the prototype files and generates the AFM for the selected die/package. After the prototype flow is complete, Designer automatically returns to the RT project. You must open your new prototyping ADB file manually to verify it.