5.18 Power Loss Budget

Table 5-6. System Design Targets for Efficiency
Parameter	Min	Typical	Max	Units
DC Input voltage	400	800	900	VDC
Output voltage	8	12	18	VDC
Nominal output power		1200	2700	W
Switching frequency		100		kHz
Efficiency Peak at any operating point At a nominal load		— 96 90		%

Loss Distribution in PSFB-CDR

For meaningful estimates and measurement of system level and component level loss distribution, extensive tests may be required. An initial estimate of loss budget and distribution is presented based on design calculations and measured total efficiency.

Table 5-7. Measured Efficiency at Nominal Load Point
V_IN (V)	I_IN (A)	P_IN (W)	V_OUT(V)	I_OUT (A)	P_OUT (W)	Efficiency (%)
800	1.75	1396	12	110.1	1321.2	94.64

Total loss at the mentioned operating point = 74.8W

Table 5-8 shows the estimated loss distribution in different sections of the PSFB-CDR

Table 5-8. Estimated Loss Distribution at the Nominal Load Point
Section	Loss [W]	Percentage [%]
Input filter	3.7	4.9
PSFB + Gate drivers	7.2	9.6
Shim inductor	2.0	2.7
Transformer	8.0	10.7
Auxiliary GD supply	1.6	2.1
Vin sense subcircuit	0.6	0.9
SR FETs + Gate drivers	26.4	35.3
Output inductors	6.8	9.0
Output shunt resistor	1.4	1.9
Output short-circuit switch	7.5	10.0
Misc (PCB losses, snubbers, AUX)	9.6	12.8

Figure 5-42. Power Loss Distribution V_IN = 800V, V_OUT=12V, P_OUT = 1200W