15.4.4 DACx Control Low Register
- Changing these bits during operation may generate a spurious interrupt.
- The edge selection is a post-polarity selection via the CMPPOL bit.
| Name: | DACxCONL |
| Offset: | 0xC88, 0xC98 |
| Bit | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | |
| DACEN | IRQM[1:0] | CBE | DACOEN | FLTREN | |||||
| Access | R/W | R/W | R/W | R/W | R/W | R/W | |||
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | |||
| Bit | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 | |
| CMPSTAT | CMPPOL | INSEL[2:0] | HYSPOL | HYSSEL[1:0] | |||||
| Access | R | R/W | R/W | R/W | R/W | R/W | R/W | R/W | |
| Reset | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
Bit 15 – DACEN Individual DACx Module Enable bit
| Value | Description |
|---|---|
| 1 | Enables DACx module |
| 0 | Disables DACx module to reduce power consumption; any pending Slope mode and/or underflow conditions are cleared |
Bits 14:13 – IRQM[1:0] Interrupt Mode Select bits(1,2)
| Value | Description |
|---|---|
| 11 | Generates an interrupt on either a rising or falling edge detect |
| 10 | Generates an interrupt on a falling edge detect |
| 01 | Generates an interrupt on a rising edge detect |
| 00 | Interrupts are disabled |
Bit 10 – CBE Comparator Blank Enable bit
| Value | Description |
|---|---|
| 1 | Enables the analog comparator output to be blanked (gated off) during the recovery transition following the completion of a slope operation |
| 0 | Disables the blanking signal to the analog comparator; therefore, the analog comparator output is always active |
Bit 9 – DACOEN DACx Output Buffer Enable bit
| Value | Description |
|---|---|
| 1 | DACx analog voltage is connected to the DACOUT1 pin |
| 0 | DACx analog voltage is not connected to the DACOUT1 pin |
Bit 8 – FLTREN Comparator Digital Filter Enable bit
| Value | Description |
|---|---|
| 1 | Digital filter is enabled |
| 0 | Digital filter is disabled |
Bit 7 – CMPSTAT Comparator Status bit
Bit 6 – CMPPOL Comparator Output Polarity Control bit
| Value | Description |
|---|---|
| 1 | Output is inverted |
| 0 | Output is noninverted |
Bits 5:3 – INSEL[2:0] Comparator Input Source Select bits
| Value | Description |
|---|---|
| 111 | Reserved |
| 110 | Reserved |
| 101 | Reserved |
| 100 | Reserved |
| 011 | CMPxD input pin |
| 010 | CMPxC input pin |
| 001 | CMPxB input pin |
| 000 | CMPxA input pin |
Bit 2 – HYSPOL Comparator Hysteresis Polarity Select bit
| Value | Description |
|---|---|
| 1 | Hysteresis is applied to the falling edge of the comparator output |
| 0 | Hysteresis is applied to the rising edge of the comparator output |
Bits 1:0 – HYSSEL[1:0] Comparator Hysteresis Select bits
| Value | Description |
|---|---|
| 11 | 45 mv hysteresis |
| 10 | 30 mv hysteresis |
| 01 | 15 mv hysteresis |
| 00 | No hysteresis is selected |