35.7 I/O Pins

Table 35-7. I/O Pin Specifications
Symbol	Description	Min.	Typ.✝	Max.	Unit	Conditions
Input Low Voltage
V_IL	I/O PORTS	—	—	0.2×V_DD	V	PINnCTRL.INLVL = `0x0`
V_IL	RESET Pin	—	—	0.2×V_DD	V
Input High Voltage
V_IH	I/O PORTS	0.8×V_DD	—	—	V	PINnCTRL.INLVL = `0x0`
V_IH	RESET pin	0.8×V_DD	—	—	V
Input Leakage Current⁽¹⁾
I_IL	I/O PORTS	—	±5	±500	nA	GND ≤ VPIN ≤ VDD Pin at high-impedance TA= 85°C
I_IL	RESET pin⁽²⁾	—	±5	±500	nA	GND ≤ VPIN ≤ VDD Pin at high-impedance TA= 85°C
Pull-up Resistance
R_P		—	30	—	kΩ
Output Low Voltage
V_OL		—	—	0.4	V	I_OL = 6 mA V_DD = 3.0V
Output High Voltage
V_OH		2.6	—	—	V	I_OH = -6 mA V_DD = 3.0V
I/O Slew Rate
t_SR	Rising	—	45	—	ns	PORTCTRL.SRL = `0x01`
	Rising	—	22	—	ns	PORTCTRL.SRL = `0x00`
	Falling	—	30	—	ns	PORTCTRL.SRL = `0x01`
	Falling	—	16	—	ns	PORTCTRL.SRL = `0x00`
Pin Capacitance
C_IO	EXTVREF0 pin	—	14	—	pF
	XTAL32K1 pin	—	9	—	pF
	XTAL32K2 pin	—	29	—	pF
	PD6 pin	—	6	—	pF
	Other pins	—	4	—	pF
✝ Data in the “Typ.” column is at T_A = 25°C and V_DD = 3.0V, unless otherwise specified. These parameters are not tested and are for design guidance only. Note: The negative current is defined as the current sourced by the pin. The leakage current on the RESET pin is strongly dependent on the applied voltage level. The specified levels represent normal operating conditions. A higher leakage current may occur at different input voltages.