43.13 External XTAL and Clock AC Electrical Specifications

Table 43-17. External XTAL and Clock AC Electrical Specifications
AC CharacteristicsStandard Operating Conditions: VDD = 1.9V to 3.6V (unless otherwise stated) Operating Temperature: -40°C ≤ TA ≤ +85°C for Industrial Temp -40°C ≤ TA ≤ +125°C for Extended Temp
Param. No.SymbolCharacteristicsMin.Typ.Max.UnitsConditions(1)
XOSC_1FOSC_XOSCExternal CLKI frequency16MHz

XIN, XOUT Primary Osc

EC (±20 ppm)

XOSC_1ATOSCTOSC = 1/FOSC_XOSC0.0625nsSee parameter XOSC_1 for FOSC_XOSC value
XOSC_2XOSC_ST(3)XOSC crystal start-up time 2.5msCrystal stabilization time only not oscillator ready
XOSC_3CXINXOSC XIN parasitic pin capacitance 0.35pFWith default crystal trim settings
XOSC_5CXOUTXOSC XOUT parasitic pin capacitance 0.35pFWith default crystal trim settings
XOSC_11CLOAD(4) XOSC crystal FOSC = 16 MHz9pF
XOSC_21ESR XOSC crystal FOSC = 16 MHz 100
XOSC_33DLEVEL MCU crystal oscillator power drive level 100 μW
XOSC_34GmXOSC Transconductance141618mA/V

XOSC Auto gain control disabled

VDD = 1.2V, TA = +25°C

Note:
  1. VDDIO = AVDD = 3.3V.
  2. The parameters are characterized but not tested in manufacturing.
  3. This is for guidance only. A major component of crystal start-up time is based on the 2nd party crystal MFG parasitics that are outside the scope of this specification. If this is a major concern, the customer must characterize this based on their design choices.
  4. The test conditions for the crystal load capacitor calculation are as follows:
    • Standard PCB trace capacitance = 1.5 pF per 12.5 mm (0.5 inches) (in other words, PCB STD TRACE W = 0.175 mm, H = 36 μm, T = 113 μm).
    • Xtal PCB capacitance typical; therefore, ~= 2.5 pF for a tight PCB xtal layout
    • For CXIN and CXOUT within 4 pF of each other, assume CXTAL_EFF = ((CXIN+CXOUT)/2).
    • Note: Averaging CXIN and CXOUT will affect the final calculated CLOAD value by less than 0.25 pF.
    Equation 43-1. Equation 1:
    MFGCLOADSpec={([CXIN+C1]*[CXOUT+C2])/[CXIN+C1+C2+CXOUT]}+estimatedoscillatorPCBstraycapacitance

    Assuming C1 = C2 and CXin ~= CXout, the formula can be further simplified and restated to solve for C1 and C2 by:

    Equation 43-2. Equation 2 (In other words: Simplified Equation 1)
    C1=C2=((2*MFGCLOADSpec)CXTAL_EFF(2*PCBcapacitance))

    Example:

    • XTAL Mfg CLOAD Data Sheet Spec = 12 pF
    • PCB XTAL trace Capacitance = 2.5 pF
    • CXIN pin = 6.5 pF, CXOUT pin = 4.5 pF; therefore, CXTAL_EFF = ((CXIN+CXOUT) / 2)

    CXTAL_EFF = ((6.5 + 4.5)/2) = 5.5 pF

    C1 = C2 = ((2 * MFG Cload spec) – CXTAL_EFF – (2 * PCB capacitance))

    C1 = C2 = (24 - 5.5 – (2 * 2.5))

    C1 = C2 = 13.5 pF (Always rounded down)

    C1 = C2 = 13 pF (in other words, for hypothetical example crystal external load capacitors)

    User C1 = C2 = 13 pF CLOAD (max) spec

  5. The maximum start-up time is user-selectable in XOSCCTRL.STARTUP.
Figure 43-1. External XTAL and Clock Diagram